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Fresher

Location:
Pune, Maharashtra, India
Salary:
3 lpa
Posted:
August 23, 2018

Contact this candidate

Resume:

*

Ms. Ankita Satish Shejul

Address:

Flat No. **, Drushti Apartment, Swami

Vivekanand Chowk, Azadnagar, Kothrud

Tehsil: Haveli

District: Pune

State: Maharashtra

Pin:411038

Mobile: +91-880*******

Email-id: **************@*****.***

Personal Information:

Date of Birth : Apr 06, 1995

Gender : Female

Nationality : Indian

Languages Known : English, Hindi, Marathi, German Career Objective:

I am looking forward to obtain a position in a leading organization where I am able to apply the knowledge gained through my master degree. I firmly believe in the principle of implementing my duties with dedication and determination. I am looking for good career growth opportunities where my talent and knowledge could be best subjected and utilized for the benefit of the organization and myself.

Educational Qualifications:

Exam Board / University Percentage / Month and Year of CGPA Passing

M.Sc. Savitribai Phule Pune University, Pune 7.82 April 2018

(Electronic Science)

B.Sc. Savitribai Phule Pune University, Pune

(Electronic Science)

71% May 2016

H.S.C. Maharashtra State Board of Secondary

and Higher Secondary Education, Pune

58% February 2013

2

S.S.C. Maharashtra State Board of Secondary

and Higher Secondary Education, Pune

89.82% March 2011

Projects Worked On:

Sr.No. Year Project Title Duration

1. B.Sc. Digital Thermometer 6 months

Sr. No. Company name Internship detail Duration

1. Sasken

Technologies

ltd.

Technology node worked on was

180nm in Cadence’s Virtuoso tool

1. Digital library/ Standard cell

layout design. (NOR gate,

NAND gate, D Flip Flop)

2. Digital circuit layout design.

(pre-driver circuit as part of

general purpose I/O)

3. Analog circuit layout design

.(matching concept of

differential pair

interdigitized and common

centroid) and current mirror

4. Low drop-out regulator

layout with 100mA pass

transistor current.

5. Common source amplifier

and differential amplifier

design.

Thesis performed are drc, lvs &

rcx in Cadence’s Assura tool.

5 months

(Internship

letter no.

0807)

Topic discussed :

1. Fabrication steps and full

chip overview.

2. Latch-up.

3. ESD(electrostatic discharge).

4. Electromigration.

5. Hot carrier injection.

6. Well proximity effect.

7. Channel length modulation.

8. Antenna effect.

Internship:

3

9. Introduction to Silicon-on-

Insulator (SOI)

10. Introduction to Finfet

Also worked on 45 nm

technology node.

Programming

languages

Embedded C, C, Verilog

Operating Systems Windows, Linux.

Software known LT-Spice, Proteus Pro, Xilinx, MATLAB, LabVIEW, Cadence Virtuoso, 4nec2, 20SIM.

IDE Tools MPLAB X, Atmel Studio.

Others Skills Communication, Presentation, Analytical, Power Point, Team and Group Work and Team Leadership.

Assembly

programming

μC 8051, μC PIC 16F877A.

Sr.

No.

Course/Participation Organization / Institute Year 1

.

English communication

Skill Development

International Centre, Savitribai Phule Pune

University

2016-2017

2 Intensive Certificate

Course in German

Savitribai Phule Pune University 2016

3 Learning through

Demonstrations

Abasaheb Garware College, Pune 2016

Technical Skill:

Certification:

4

Dr. Damayanti. C. Gharpure: Professor,

Department of Electronic Science,

Savitribai Phule Pune University, Pune

Tel: +91-020- 25699841

Email: ***@***********.*******.**.**

Ms. Kalpana Kumar : Project Manager,

Sasken Technologies Limited,

Tel: +91-020-********

Email: *******.*****@******.***

Declaration:

I hereby declare that all the above information furnished by me are true to the best of my Reference:

5



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