Design Engineer Electrical
Resume:
William B Thompson
Escondido Ca 92025
*****************@*****.***
SUMMARY
Senior Electronic Design Engineer with 20 plus years in development of electronic circuit and assembly designs with most recent focus on display and imaging system design. Responsibilities have encompassed the full product development life cycle from conception to product delivery. Demonstrated strong technical lead in development of board level hardware systems with digital/ baseband electronics, low frequency analog (<1 GHz) and board associated power supply development.
SKILLS
Responsible for all aspects of the hardware development including concept and detailed design, PCB development, design verification, qualification and pre-production builds while working closely with other functional team members
Implementation of high speed video signal / digital signal processing algorithms within FPGAs such as data compression and offset/gain corrections in real time. Implementation of synthetic vision algorithms for neural networks within FPGAs.
Experience in hardware development for extended environment requirements including space and airborne. Designed radiation hardened FPGA logic for space payloads.
Experience with development tools for the design / schematic capture, simulation, and debug of board level products such as Mentor and Cadence tools (DXDesigner, PADS Layout, ORCAD Capture and Allegro). Experience with design integrity tools in both Cadence and Mentor. Capable of achieving own high speed PCB layouts with these tools.
Excellent working knowledge of analog and digital electronics including: circuit design, schematic capture, printed circuit board layout, circuit card assembly, test and troubleshooting techniques. Have implemented designs interfacing to standard high speed I/O standards such as Displayport,Ethernet, PCI, SPI, I2C, as well as DDR memories. Digital designs up to 12 gigahz.
Experience with the design, functional partitioning, synthesis and simulation of FPGAs, PLDs and/or ASICs using Verilog or VHDL. This includes designs with Altera, Xilinx or Actel (now Microsemi) synthesis tools: Quartus, Vivado and Libero. Experience with Chipscope and Modelsim. Implementation of memory management units in FPGAS for DDR3 and DDR4
Familiar with Microsoft Office tools (Word, Excel, PowerPoint, Visio, Project) to create documentation such as specifications, bill of materials, schedules and test procedures. Familiar with business collaboration platforms such as JIRA, Confluence and Sharepoint.
EDUCATION
MSEE San Diego State University
BSEE University of Rhode Island
EXPERIENCE
Senior Electrical Design Engineer
6/1/2013 -- Present
Leidos - San Diego
Development of portable Xray imaging systems and nuclear spectroscopy systems.
Senior Electrical Design Engineer
8/1/2009 – 5/30/2013
Chassis Plans – San Diego
Design and integration of rugged computer systems
Senior Electrical Design Engineer
5/1/2004 – 7/30/2009
SAIC - San Diego
Development of radiographic imaging systems and air air/space borne hyper spectral imaging systems
FPGA Design Consultant
6/1/2006 – 6/30/2008
Neurosciences Institute (NSI) – Torrey Pines
Implementation of neural networks and retina fabric within FPGAs for synthetic sensory processing.
Lead Electrical Design Engineer
4/1/2002 – 4/30/2004
GET Engineering - El Cajon
Led team in development and design of electronics for Navy tactical data systems.
Senior Electrical Design Engineer
6/15/1989 – 3/30/2002
SAIT - San Diego
Development of flat panel display systems and video acquisition systems for avionics.
Electrical Design Engineer
7/1/1987 – 6/1/1989
Scientific Computer Systems – San Diego
Design of CPU and memory management units for mainframe computers.
Contact this candidate