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Power Plant Design

Location:
Bangalore, Karnataka, India
Salary:
Company standard
Posted:
September 24, 2018

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Resume:

Jyotirmaya Mohanty

Personal Data

Date of Birth: 08 March 1992

Address: D-122,NALCO NAGAR TOWNSHIP,ANGUL-759145

Phone: 824-***-****

email: ac65kl@r.postjobfree.com

CAREER OBJECTIVE

To contribute through dedication,hardwork,sincerity towards scientific and technological growth of the institution, wherein I get the opportunity to employ my academic, scientific and technical knowledge. Education

Current Integrated M.Tech Dual Degree Departmentof Electronics and Communication, National Institute Of Technology, Rourkela

Major: Communication and Signal Processing

Advisor: Shrishailayya Hiremath

Gpa: 7.3/10

2010 Intermediate in Science,

College of Basic Sciences and Humanities, OUAT,Bhubaneswar, Odisha Percentage: 63.3

2008 Matriculation,

Delhi Public School, Nalco Nagar

Percentage: 89.5

Projects

UART DATA TRANSMISSION June20-July,2014

I implemented UART transmission using SPARTAN BOARD at the SION Semiconductors. It was part of a 35 days course on VLSI

SPECTRUM SENSING May-November,2015

Here I simulated spectrum detection using spectrally efficient algorithms under the heading of cyclostationary approach as part of summer project PHYSICAL LAYER of 802.11ac in GNU RADIO January-April, 2016 The physical layer of 802.11ac i.e. the basic OFDM was implemented in GNU Radio and an attempt was made to detect the signal using Cyclostationary and Matched Filter techniques. Hence by extending it, I was able to design a White Space(White-Fi)detection based on 802.11af standard. This was achieved by integrating detection blocks to 802.11ac architecture.

Mini Projects OCT-DEC,2016

Initially,we started with module level project as Traffic Light Controller.Then as part of FPGA level project, I accomplished Boothe Multiplier,Universal Shift Register and Synchronous FIFO.These themes were also functionally verified and synthesized. Verification Projects NOV-DEC,2016

Coming to verification modules,I wrote a Reusable Verification Environment in System Verilog particularly, the FIFO verification part. AHB to APB Bridge DEC 2016-FEB 2017

Basically, I implemented the slave portion of the AHB to APB bridge. The main modules were Master to Slave Multiplexer, Slave to Master Multiplexer, Decoder,Arbiter and Static Memory Interface. The code was synthesized in Vivado 2014.4. Automated Parking Assistance JUL-AUG,2018

We used an RFID card reader to identify authentic guests. Using SPI protocol,we had to establish a communication between the Entry point and Exit point. The Exit point would send an acknowledge signal to indicate departure of an user and Entry point in turn would send Entry time, for the Exit point to calculate the time of parking and charge the user accordingly. Here we had to use an LDR based Detector systems to detect car at checkpoints.

COURSES

C++,Linux 7weeks,2013

I pursued C++,Linux course at Lakshya institute in Bhubaneswar,Odisha. VLSI 24 weeks,2016

I pursued certified VLSI course including Design,System Verilog and UVM at SANDEEPANI SCHOOL OF VLSI SYSTEM DESIGN at Bengaluru.

EMBEDDED SYSTEMS DESIGN 22 weeks,2018

I again pursued certified Embedded Systems Design Course at Sandeepani School of Em- bedded Systems Design. The course syllabus included Advanced C language,ARM-7 ar- chitecture,Computer Architecture,Digital Design,Data Structures, BASH Scripting and finally GPOS(General Purpose Operating Systems). We implemented our projects on KEIL NXP2378 Board having an ARM 7 processor.

Work Experience

May-June15,2014 SUMMER INTERN,CAPTIVE POWER PLANT,NALCO NAGAR Here I studied the industrial ethernet networks and their protocols and also studied the Hart protocol along with Distributed Control Systems Technical Skills

General Programming:C,C++,Python,Verilog,System Verilog,Keil Hardware/Software Tools:Xilinx ISE,Vivado 2014.4/2016.1,Questa Sim 10.4b,Matlab,Multisim,GNU Radio, Hardware Analog Knowledge

Amplifier Differential Amplifier,Current Feedback Amplifier Oscillators Phase Shift Oscillator,Wien Bridge Oscillator,Schmitt Trigger Astable Oscillator ADC Techniques Quantization,Signal to Noise Ratio,Aliasing,Dual Slope Technique,Sigma Delta Oversampling Converter,Voltage to Frequency Converter DAC Techniques Weighted Resistor DAC,R-2R D/A Voltage Switching, MDAC(Multiplying Digital to Analog),Pulse Width Modulation(DAC) BJT Combinations Darlington pair,Current Source and Mirror, Wilson Current Mirror,Darlington,rSeries Shunt Feedback Pair Soft Skills

Languages English - Professional Fluency

Deutsch,Hindi - Basic Fluency

Oriya- Mother Tongue

Soft Skills Overcritical Analysis

Conflict Resolution

Adaptability

Extra Curricular Activities

VOICE CLUB Devotee, 2011 - 13

I would ocassionally participate in MNC sessions and speeches by ISCKON members CYBORG Participant, 2011-13

I joined Cyborg Robotics and had briefly participated in 2011 Manual Control Racing SWIMMING CLUB Regular Swimmer, 2015-16

Already participated in induction process.I have already mastered floating technique and free-style technique

Scholarships and Certificates

November 2011 Track Racing(INNOVISION) - 5th

Interests and Activities

Interests Kernel Programming,Communication Processors Activities Swimming,Cycling/Biking

Hobbies Technological Geek, GIZMAG, ENGADGET, DIY GADGETS



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