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Design Electrical Engineering

Location:
Austin, TX
Salary:
60000 USD per annum
Posted:
May 22, 2018

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Resume:

GAUTHAM GOPALAKRISHNAN

***** *********** ****, ******, ***** 78739 214-***-**** ************@*****.*** www.linkedin.com/in/gautham-gopalakrishnan-23836180 CAREER OBJECTIVE

To seek an eternal educational path with immense potential and opportunities and to enhance my skills and gain industrial expertise in Digital Circuit Design.

TECHNICAL SKILLS

Programming Languages: C, C++, MATLAB, Python

HDL/HVL: Verilog, VHDL, SystemVerilog, SystemC, UVM OS/Simulators: UNIX, GEM5, Xilinx ISE, Design Vision, Code Composer, HSPICE, PRIMETIME, ModelSim, OpenCV Design tools: Cadence Design, ENCOUNTER, Microwave Office, Keysight ADS, KEIL uVision5, Simulink, LABVIEW Microcontrollers/FPGA: MSP430, ATMEGA 16, STM32

Certifications: SOC Verification using SystemVerilog with Assertions and Coverage. EDUCATION

Masters in Electrical Engineering, University of Texas at Dallas, Richardson, TX CGPA 3.82/4.0( Graduated May 2018) Bachelors in Mechatronics Engineering, SRM University, Chennai, India CGPA 9.81/10.0(Graduated May 2016) ACADEMIC EXPERIENCE AND KEY PROJECTS

4-bit by 4-bit Combinational Multiplier Design

Designed a 4-bit Unsigned Combinational Multiplier in Cadence Design for minimum Area Energy Delay Product(AEDP) - drew the full schematic and layout of the components of the design using IBM 130nm process, tested the functionality of the components using test benches in HSPICE, implemented a floorplan of the entire design and simulated the final extracted design. 16-bit ALU Design

Designed a 16-bit ALU in Cadence Design and IBM 130nm process which could perform 16 different arithmetic, logical and shift operations- simulated the behavioral design in Verilog, drew the full schematic and layout of the individual gates involved and tested them using HSPICE and performed the automatic placing and routing of the individual cells using Encounter. Facial Recognition Algorithm Implementation – Internet of Things Implemented a Facial Recognition System using Raspberry Pi and OpenCV which involved gathering data from camera module, training the algorithm for face detection using faces and recognition of faces by the trainer using the existing dataset using OpenCV Recognizer and Python Coding. Also interfaced the data to ThingSpeak IoT Cloud Platform to visualize and analyze data. Operational Amplifier Design

Designed a Two-Stage Operational Amplifier using 0.35 um CMOS technology in Cadence Virtuoso with a supply voltage of 2.5V and power dissipation of 2mW and achieved the following results and specifications: -

DC Gain = 70 dB, Phase Margin = 60 degrees, Slew rate = 10 V/u sec and Unity Gain Bandwidth = 5 MHz CPU Cache Design and Optimization

Designed a CPU Cache Memory with a separate L1 and a Unified L2 Cache, Optimized CPI for different benchmarks by varying Block Size, Cache Size and Associativity using a Python Script and explored the Tradeoffs between Cost and CPI, while running on GEM5 simulator.

Dual Band Cross Coupled Branch Line Coupler Design Designed a 3-dB Dual Band Cross Coupled Branch Line Coupler in AWR Microwave Office as an improvement to the conventional Branch Line Coupler using MLIN and MSUB at operating frequencies of 1 GHz and 3 GHz and plotted the Insertion Loss, Isolation Factor and Coupling Factor of the Coupler using S-parameters for both 1 GHz and 3 GHz. Frequency Measurement Device Design

Designed a Frequency Measurement Device using STM32F429 Discovery Board and KEIL uVision5 by exciting the circuit under test with a sinusoidal wave, and analyzing the response of the test signal using FFT algorithm. Displayed the Gain and Phase of the circuit for a given frequency on the oscilloscope.

System Identification Techniques Implementation

Implemented a System Identification Technique using LMS and NLMS Filtering in MATLAB and identified the optimal filter order, transfer function, impulse responses and minimum mean square error between given input and output audio signal pairs. HONORS AND AWARDS

Recipient of the Selden Leavell Scholarship for 2017-2018 at the University of Texas at Dallas, Richardson, TX.

University Gold Medalist and department topper of Mechatronics Engineering at SRM University, Chennai, India.



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