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Engineer Design

Location:
Hyderabad, Telangana, 500032, India
Salary:
7 LPA
Posted:
April 30, 2018

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Resume:

Name

Nataraj Kuruba

Proposed Role

Build and Test Engineer

Experience Summary

2.4 years of experience in TCS in Telecommunication, 3G/4G (RBS/LTE) product, Continuous Integration, Test Automation and Tool Development

●Experience in front-end Verification using System Verilog, UVM and RTL Design.

●Expertise in verification tool Synopsys VCS.

●Good in Constraint based and Coverage Driven Verification and exposure to AMBA protocols.

●Good in Perl, Python, Bash Shell scripting and Unix/Linux.

●Expertise in GIT, Clear case, Gerrit, Jenkins, Jira, and Nexus.

●Excellent knowledge in Telecom domain.

●Strong Analytical, Coding and debugging skills.

●Good oral and written communication skills.

Skill Summary

Education

M.Tech in VLSI System Design

Operating Systems

Linux, Unix, Windows

Languages

Verilog, System Verilog, UVM, Shell, C and Perl, Python

Tools

Synopsys VCS, MIA, DT Engine, GIT

Database

MySQL, Mongo DB

Integration, Automation

Jenkins, Gerrit, ARM, Nexus, Open ALM

SCM

GIT, SVN and Clear case

WoW

Agile

Project Summary

May2016–Till date

Build and Test Engineer

Project Description:

Connectivity Packet Platform (CPP) is a platform product for high availability applications to be used when developing ATM (Asynchronous Transfer Mode) and IP (Internet Protocol) based nodes.

In principle, CPP is designed like the chassis of a car. Different car models can be built up upon the same chassis by applying different designs of the car body, engine etc. CPP can be the base from which it is possible to develop a switching network node such as a small to large sized Asynchronous Transfer Mode (ATM) or IP switch, a radio base station (RBS/LTE), a Radio Network Controller node (RNC) or a Mobile Media Gateway (M-MGw).

Responsibilities:

●Automated Clear Case (Maintenance) and GIT(Development) based release management processes including monitoring changes between releases.

●Maintenance responsible for CPP GIT repos and Gerrit project.

●Admin responsible for CPP Jenkins instance, ARM and Nexus.

●Implemented Eiffel based prewash setup for CMX and SMX deliveries from 3PP

●Configuring new jobs for automating design and test activities.

●Redesigning existing job configuration with more robust functionality.

●System level Test automation using JCAT.

●RFIs and third party deliveries handling through JIRA tool.

●Maintaining and executing build scripts by coordinating with development/QA teams.

●Redesigned and rewrote release build system.

●Automated nightly build, test, and reporting mechanisms.

●Point of contact for trouble shooting build and integration issues for applications.

●Involved in important feature verification such as HAL feature,2.5 Changer (Uboots3, DTB upgrade), NVPI feature, HTMI feature for the product 4G/5G(LTE)

●Complete responsibility for CPP Deliveries to customers.

Jan2016–Apr2016

Ericsson

Project Description:

Design and Verification of I2C Protocol

Design and verify I2C protocol with DMA as Master and SRAM as a Slave. Verified the design using UVM.

Responsibilities:

Understand the specifications and working of I2C protocol

Designed the I2C master and slave, verified the design using UVM

Implemented the constraints for getting required stimulus generation

Implemented coverage class for checking functional coverage

Implemented the Assertions to check functionality of the Design

Nov2014-Nov2015

M.Tech Project

Project Description:

Design and Verification of APB Protocol

Design and verify APB protocol with FIFO as Master and SRAM as a Slave. The Advance Peripheral Bus(APB) is part of the AMBA hierarchy of buses and is optimized for minimal power consumption and reduced interface complexity.

Responsibilities:

Understand the specifications and working of APB protocol

Designed the APB slave SRAM and verified using Verilog test bench

Designed the APB master and FIFO

Verified the Design using UVM

Implemented the Assertions to check functionality of the Design

Implemented the constraints for getting required stimulus generation

Implemented coverage class for checking functional coverage

Personal Details

Name

: NatarajKuruba

Date of birth

: 15-03-1992

Mail id

: ac5atc@r.postjobfree.com

Contact

: +91-949*******



Contact this candidate