SHAIK YEZAZUL NISHATH

Professional Summary

To work in an organisation that will utilize and enhance my skill set in the field of CMOS IC circuit design, ASIC/FPGA design and semiconductor device physics. Highly ambitious to learn new technologies. History of being an effective team member with a full understanding of the process.

Skills

Digital IC/ASIC Design: Cadence Virtuoso, Xilinx ISE, Languages: Verilog DSCH, Cadence NClaunch Shell script: UEFI

Analog Design: Cadence Virtuoso 64, TINA TI Platforms: Windows, Linux Layout tool: Encounter, Microwind

CAD Design: Comsol Mutliphysics

Work History

Member of Technical Staff 06/2017 to current

Velankani Electronics Pvt Ltd – Bengaluru, KA

To test the configuration of the assembled Intel servers.

Updating the test packages.

Documenting the test process.

Updating the BIOS and BMC firmware versions.

Responsible for finding the root cause of the failed servers by analysing the log files.

Trained the test technicians and operators on test hardware and software.

Familiar with Grantley server platform, micro architecture of Intel Haswell processor

& Intel Wellsburg chipset.

Personal Strengths

Hard working and good at team work

Rapid at learning new things

Self motivated and determined

Postive attitude

Sri satya building, Electronic city phase 1, Bengaluru-560100 (H) 910-***-**** ac58et@r.postjobfree.com

Projects

M.Tech Semester projects

1) Title: Design of an efficient phase frequency detector for a Digital Phase Locked Loop

Published in IJERT journal, Vol.5 Issue 04, April 2016

Abstract: The design and analysis of the DPLL is carried out in this project. The proposed PFD is designed using 26 transistors whereas, conventional PFD uses 54 transistors.

EDA tool: Prototype has been designed in Cadence Virtuoso environment and implemented using GPDK180 library of 180nm technology.

Team size: 1

2) Title: Design of high frequency PMUT for MEMS applications

Abstract: Transducer operating at 10MHz frequency has been designed for high frequency MEMS application, scanning a fingerprint by PMUT comes under high frequency application. Optimized PMUT is designed by choosing correct dimensions and the reduction of cross talk between the transducer elements is also achieved. Level shifter is designed for generating high voltage signal to drive MEMS device.

Software used: Comsol Multiphysics, TINA TI

Team size: 1

3) Title: Design of 8 bit MAC unit using Wallace Tree and carry look ahead adder

Abstract: Most DSP applications such as filter require the MAC unit. It is implemented using fast binary adder and multiplier.

Software: Xilinx ISE

Language: Verilog

Team size: 1

4) Title: Numerical Analysis of vibration based MEMS Piezoelectric Energy Harvester

Abstract: Piezoelectric energy harvesters are preferable than conventional batteries to deliver power to MEMS devices because the conventional batteries have short life span and also occupy larger area. In this project the different piezoelectric materials substantial output voltages are compared.

Tool: Comsol Mutliphysics

Team size: 1

B.Tech Projects

5) Title: Reactivation noise suppression with sleep signal slew rate modulation in MTCMOS circuits

Abstract: To overcome the leakage power and reactivation power a “Stepwise Vgs MTCMOS” technique and sleep transistor techniques are introduced.

Software used: DSCH, Microwind

Team size: 2

Education

M.Tech: VLSI Design 2016

VIT University – Chennai, TN

Graduated with 8.84 CGPA

B.Tech : Electronics and Communication Engineering 2013 Shadan Womens college of Engineering & Technology –Hyderabad, Telangana

Graduated with first class in distinction by scoring 72.6% Intermediate: Maths, Physics and Chemistry 2009

Sri Chaitanya Junior College –Anantapur, AP

Percentage scored: 88

High School 2007

St.Joseph high school – Anantapur, AP

Scored 84.5%

Hobbies

I enjoy reading Line webtoons and watching anime.

Cooking

Gardening

Personal information

D.O.B: Nov. 22, 1992

Nationality: Indian

Gender: Female

Marital Status: Single

Declaration

I hereby declare that all the information provided are true, complete and correct to the best of my knowledge and belief.

Shaik yezazul nishath

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