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Design Engineer System

Location:
Concord, CA
Posted:
July 07, 2018

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Resume:

Huelam Hoang

** ***** ****** **.

Pleasant Hill, CA 94523

925-***-**** (M)

ac56db@r.postjobfree.com

SUMMARY

RF Design and System Architect, Field deployment, detail RFIC and circuit Module design, Transceiver mm-Wave design that utilizes my engineering experience and analytical abilities to design and resolve complex architectural problem.

• Hand on technical leader of the product development and debug.

• Co-author of several invention and patent, 4x8 MIMO antenna BTS.

• Key technical contributor to the project successful.

• mm-Wave Transceiver module designed to customer specification.

• Product development from concept to production released. PROFESSIONAL EXPERIENCE

April 2015 – February 2018 Viettel

Principal RF System Engineer (Acquired Public Wireless)

• Define top-level system architecture and decompose system into major subsystems o Define and allocate key RF system requirements to appropriate subsystem module. o Design RF transceiver Digital Front End specifications to the number of bits required on ADC and DAC interfacing to FPGA.

o Identify and specify functional flows and performance characteristics of logical, physical, clock, data and control interfaces among system components to facilitate system integration.

• Successfully led an engineering team to develop an eNodeB Macrocell LTE multi-band BTS, 4x4 MIMO antenna RF transceiver design, 60W PA LDMOS Doherty and CPRI interfaced to baseband module.

• Led the hardware group design and implementation of CFR and DPD linearization for a 60W PA using Xilinx IPcore on the FPGA Zynq ZC70Z35, and transferred to manufacturing for large volume production . o Achieved system performance of CFR reduction of LTE signal PAPR to 6.5dB, 4% EVM and still maintained ACLR of -60dB at 40W output power.

o Achieved effective output power efficiency of the 60W PA at 32~35%.

• Designed a complete low jitter clock distribution system for the baseband, network synchronization via GPS, RF transceiver, JESD204B interface to FPGA, CPRI data and clock recovery.

• Familiar with 3G and 4G standard compliance (GSM, WCDMA, LTE, OFDM).

• Used Cadence Allegro PCB, OrCAD Schematic Capture, MATLAB, Keysight SystemVue and ADS and Xilinx Vivado.

o Expertise in RF Smith chart and 2-ports impedance matching network for RF/mm-Wave circuitries. o Used RF test equipment including Keysight VNA, VSA 89600, PXI and Rohde & Schwarz CMW500, Aeroflex TM500.

o Added to years of experience in RF mm-Wave frequencies up to 38GHz transceiver design, including VCO/PLL, sampling phase detector, frequency multipliers, mixers, LNA and a power amplifier. Nov 2011 – April 2015 Public Wireless Inc.

Principal RF Design Engineer

• Led a hardware design team and integration of the Small Cell LTE base station using the NXP baseband B4860, CPRI interface with the Digital Front END and RF transceiver with Gigabit Ethernet back haul.

• In depth knowledge and design experience usage of ADC/DAC, over sampling, FIR, fractional synthesizer PLL, phase noise requirement for OFDM (LTE) on system with multi sub-carrier, power amplifier non-linearity affected on system performance and data throughput degradation, monitoring KPIs field tested data feedback for future design improvement.

• System optimization on 5W PA Third Order spectrum re-growth with Scintera chipset APD linearization circuit for LTE high peak-to-average power ratio and minimize packet error rate due to symbol interference.

• Used MATLAB for system analysis of binary to complex data dumped, raw data captured in real-time, plotting and analyzing frequency error, I&Q cross talk, receiver saturation and I&Q time domain analysis.

• Deigned a system using Keysight ADS/SystemVue for system simulation on DSP, RF microwave circuit and Momentum EM 3D to model high frequency affected by close proximity coupling and radiation. April 2007 – June 2011 Adapwave Technologies Inc.

Architect RF System & Design Engineer

• WiMAX base station architecture design.

o Operated in 1700MHz and 2500MHz band.

o Managed all technical aspect design of the WiMAX base station, ensuring 802.16e standard compliance to wave-1 & 2, reliability and inter-operability testing with the terminal site (user equipment).

• Designed an RF heterodyne MIMO transceiver with 4-Tx and 8-Rx RF channels, LNA, up-and-down converter, PLL synthesizer and a 1W PA.

o Designed circuits using OrCAD/Allegro schematic capture and PCB layout. Feb 2003 – April 2007 UTstarcom Inc.,

Lead RF Design, R&D Beijing China

• Chief RF architect for the 2TX 8RX 1W GSM BTS (2G), 10Watts W-CDMA BTS (3G) and WiMAX base stations. o Architecture designed for low cost, reliability and high volume manufacturing.

• Responsibilities included standard compliance conforming design, managing product transfer to manufacture, quality assurance and on-time product delivery to customers.

• Exceptional team-builder, adept at managing cross-functional teams. o Energized and passionate regarding all team members maintaining high productivity output, high quality products and maintaining good moral standards.

o Set clear objectives for team members to achieve success and allocated necessary resources to complete assigned tasks.

April 1991 – Feb 2003 Stratex Network

Senior RF Design Engineer

• Led project design from concept and system level architecture.

• Defined and designed the RF system and sub-system of the radio to specifications.

• Responsible for sub-system module integration and testing, and project schedule.

• Provided RF technical consulting to other engineers within different disciplines.

• Designed a low phase noise synthesizer for a QAM radio application with a frequency range of 6-38GHz high performance frequency synthesizer over temperature from -45C to +55C.

• Designed a family of PLL VCO 3-9GHz/synthesizers for direct FSK modulation, for a point-to-point back haul radio.

• Designed a transceiver with 2W output power, and 10dB dynamic tuning range.

• Designed experience with RF mm-Wave frequency transceiver, which included a VCO/PLL, GHz phase detector, frequency multipliers, mixers, LNA and a Power Amplifier. May 1988 – April 1991 Hewlett-Packard, (Agilent) Stanford Park Division RF Design Engineer

• Designed a GaAs FET MMIC 30dBm power amplifier (0.01-3.0GHz) for the HP8780A.

• Designed and supported of a vector signal generator from R&D to manufacturing transfer.

• Designed 2-2.75GHz frequency doublers for the HP8970B noise figure meter. EDUCATION

• BS, Electrical/Electronic Engineering (Analog/RF and Microwave Design & Communication Systems), California State University.

• Stanford University graduate courses studied included Linear Active Networks, Analog Integrated Circuits Bi-CMOS, Microwave Transistor Amplifier, Frequency Synthesizer, PLL and Oscillator Design. AFFILIATIONS

• Member of Tau Beta Pi (National Engineering Honor Society)

• Member of Golden Key National Honor Society



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