DAVID D. KABASSIMA

Availability to interview: ** hours’ notice

Availability to start: 2 weeks upon offer

Validation design engineer with experience in Post-Silicon Power integrity validation and pre-silicon Virtual Platform (VP) validation in farm environment. Used UNIX and Linux to validate VP ingredients in command line interface tools and widgets. Created Release on Windows driver VP to more than 400 customers and prepared bug reports. Built experience in DC-DC Buck converters and Integrated Voltage Regulators testing and debugging. Designed and Validated PID controllers for Microprocessor power modules and optimized their efficiency.

Additional expertise includes:

• C++, Matlab, PSpice, JavaScript, Unix/Linux • Active Filters design and testing

• Analog and Power Electronics, Load Flow • Python and JMP Statistical Modeling/Processing

• Industrial Power distribution, Metering and Sizing • Project and People management for success

• Pre and Post-Silicon Validation and Verification • Systems Engineering

CERTIFICATIONS

Fundamentals of Engineering(FE/EIT Certified), State of Florida BPE October 2011

Certified JavaScript, Python, HTML, XHTML, CSS and XML Web Developer.

A+ Computer Repair and Upgrade Certification training by THA, Tampa, FL

Florida Certified Health, Life and Annuities Insurance Salesman (2012).

HIGHLIGHTED ACCOMPLISHMENTS

Created Power Efficiency tables for Intel Canon Lake (CNL) class of microprocessors using Python.

Pre-Silicon Verification of CPU power module Integrity and Efficiency in Python and JMP environment.

Developed PID Controllers for Intel Buck Convertors in Integrated Voltage Regulators using Python.

Built Emulation Windows Virtual Platform Recipes from different ingredients using Linux.

Validation and Verification of CPU Power Efficiency for Intel BDW, CNL and HSW.

PROFESSIONAL EXPERIENCE

TTM Technologies Forest Grove, OR 01/2018 to Present

Clean Room Machine Operator

Worked in PCB manufacturing parts for Automotive, Military, Industrial, and Computing and Aerospace.

Operated machines for plastic Lamination of PCB boards.

Sampling, Quality Control and Refining of Machine production output

Used Operator Worksheets to meet customers order commands.

Operated Clean room machines for cutting and Lamination of PCB parts.

Poly-Cast Corporation Tigard, OR 03/2017 to 12/2017

Machine Operator

Worked in plastics manufacturing producing parts for Automotive, Military, Industrial, and Sporting goods.

Operated machines for plastic molding of parts.

Sampling, Quality Control and Refining of Machine production output.

Used Operator Worksheets to meet customers order commands.

Operated machines for cutting, wrapping, labeling and packing.

Packed plastic parts for shipment to customers.

Intel Corporation Hillsboro, OR 10/2016 to 02/2017

Validation Design Engineer

Drove Intel Ice Lake Pre-Silicon Virtual Platform (VP) validation in Farm environment using Linux.

Used UNIX and Linux to validate VP ingredients in command line interface and tool and widgets.

Experience with Remote server and networking using Linux and UNIX in Windows driver.

Validated and verified pre-silicon environments (Verification, Virtual Bring-Up) in Windows driver.

Used Jenkins and Excel to validate USB, SATA, eMMC devices doing automation testing in Virtual platform.

Designed and built USB, eMMC, SATA hardware booting recipes to Windows Platform with UNIX and Linux.

Created Release on VP to more than 400 customers and prepared bug reports.

Epic Systems, Inc. Beaverton, OR 03/2016 to 10/2016

Customer Service Representative

Provided customer service in Cybersecurity (Proprietary).

Designed digital circuits including timers, displays and voting systems.

Data Entry for Mailroom Operation to notify customers.

Intel Corporation, Hillsboro, OR 10/2012 to 05/2015

Validation Design Engineer

Led post-silicon microprocessor electrical validation using Oscilloscopes, Digital multimeters for HSW, BDW and CNL class microprocessors.

Developed post-silicon validation infrastructure (Software, Hardware, Automation, and lab setup).

Did Automation Testing of CPU voltage regulator power module and efficiency optimization using DC power supplies and electronics loads in XML, Excel and JMP environment.

Validated the Integrated Voltage Regulator PID Controller in CPU domains (Core, Graphics, etc.).

Drove Buck converter and voltage regulators power efficiency testing, performance, and Optimization for Cannon Lake and also its post-silicon debugging.

Managed Impedance phase angle optimization, DAC linearity testing using Python/Excel/JMP software

USF, Tampa, FL 01/2010 - 05/2012

Electrical Engineer and Lab Instructor

Did Independent studies on Complex Systems Engineering, User Stories, Use Cases and SCRUM.

Supervised students in Electronics lab II projects such as square and triangular signal generators, 555 timers, and synchronous and asynchronous multivibrators.

As group project built heart rate monitor: full design, build, and test phases.

Conducted independent studies on Wireless Cognitive Radio Security including attack schemes, key management, trust systems management and protection.

Designed reverse pendulum and automobile proportional integral derivative (PID) cruise controller using digital and linear concepts in MATLAB environment.

Worked on RF/Wireless program and measurements including noise measurement, Electromagnetic Shielding, Period gram, eye diagram, BER, VSWR, VNA, and SA using ADS.

Designed, built, and tested a DC-DC Buck converter using lab power supplies, oscilloscope, DIMM.

Designed, built and tested active filters and Oscillators using multiple topologies in P-Spice.

EDUCATION

MS, Electrical Engineering (GPA: 3.48/4.0), University of South Florida, Tampa, FL 12/2011

BS, Electrical Engineering, University of South Florida, Tampa, FL 12/2006

HONORS

National Science Foundation (NSF) STEM

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