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Assistant Engineer

Location:
Ithaca, NY
Posted:
February 27, 2018

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Resume:

DEEPAK AGARWAL

ac4mky@r.postjobfree.com 607-***-**** linkedin.com/in/deepakagarwal17/ github.com/da475 118 Prospect Street, Ithaca, NY 14850 EDUCATION

Cornell University, Ithaca, NY

Master of Engineering in Electrical and Computer Engineering Aug 2017 – May 2018 (expected)

GPA: 3.78/ 4.0

Selected Coursework: Computer Architecture • Operating Systems • Embedded Systems • Computer Vision National Institute of Technology (NIT) Allahabad, India Bachelor of Technology in Electronics and Communication Engineering Jun 2008 – May 2012

GPA: 8.88/ 10.0

Selected Coursework: Digital Electronics • Computer Organization • Computer Programming • Microprocessors WORK EXPERIENCE

Teaching Assistant, ECE Department, Cornell University Jan 2018 – Current Scope: Assistance to students in implementing laboratory projects on FPGAs

• Working under Prof. Zhiru Zhang as a teaching assistant for ECE2300 Digital Logic and Computer Organization

• Using the Altera DEO-CV FPGA and Quartus II software for Verilog programming and logic synthesis Firmware Engineer, Qualcomm, Hyderabad, India Oct 2012 – July 2017 Scope: Integration of audio-voice solutions, assembly level optimizations, firmware enhancements

• Member of Signal Processing and Linux Android Audio teams handling audio/voice codecs and post-processing algorithms

• Assembly-level programming on Qualcomm’s Hexagon architecture to optimize metrics such as MIPS and bandwidth

• Responsible for integration of 3rd-party algorithms from Dolby, DTS, and 3GPP into Audio HAL layer

• Enhanced firmware to meet new requirements like dynamic loading, common interface, and customer integration ACADEMIC PROJECTS

Design of a Multi-Core Processor, ECE Department, Cornell University Aug 2017 – Dec 2017

• Developed a quad-core processor based on the RISC-V ISA with private instruction caches and a common data cache

• Designed distinct components, such as single processors, cache and networks, and integrated them into a multi-core module

• Synthesized the RTL in Verilog, and tested it using a Python test framework Detection of Zebra Crossings for the Visually Impaired, ECE Department, Cornell University Aug 2017 – Dec 2017

• Developed a model to detect pedestrian zebra crossings for partially or fully visually impaired commuters

• Used Hough transforms and curve-fitting algorithms for pattern and line detection

• Manually generated datasets to encompass different scenarios, and automated the testing via Python scripts Booth Hybrid radix 4/8 multiplier, ECE Department, NIT Allahabad Nov 2011 – May 2012

• Designed radix-4 and radix-8 multipliers and compared the power-performances of the two designs

• Prototyped a hybrid version of the two multipliers to improve speed and reduce power-consumption

• Implemented and verified the code on FPGAs and analyzed the performance improvement using Synopsis simulator PROFESSIONAL PROJECTS

Dolby Surround, Linux Android Team, Qualcomm, India Nov 2016 – Jun 2017

• Spearheaded the project to integrate MS12, an audio post-processing package from Dolby, into Linux Android HAL layer

• Enhanced the reference implementation further to support dual-main stream playback for applications like Netflix

• Developed multi-threaded firmware applications to allow support for simultaneous playbacks

• Led internal meetings and external discussions with suppliers, customers, and testing teams DTSHD Compressed, Linux Android Team, Qualcomm, India Apr 2016 – Nov 2016

• Drove the project for assimilating the DTSHD HDMI format for Freebox TV

• Programmed C-based packetizer modules to convert DTSHD compressed bitstreams to IEC61937 compressed formats

• Scheduled regular discussions with the DTS and verification teams to resolve certification and approval issues Hexagon Processor Assembly, Signal Processing Team, Qualcomm, India May 2014 – Jan 2016

• Tasked to optimize and integrate audio and video codecs into Qualcomm’s processors

• Programmed extensively with the Hexagon assembly-level language to meet DSP metrics and requirements

• Combined techniques of software pipelining, loop unrolling, vectorization, and C intrinsics to streamline the integration TECHNICAL SKILLS

Languages: C, C++, Python

Tools: TensorFlow, Altera Quartus, Adobe Audition, Trace32, Arduino, Raspberry Pi, VisionX Interests: Computer Architecture, Operating Systems



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