Thomas Wang, Ph.D.

** ******** *** ****: 774-***-****

Mansfield, MA 02048 ac4knc@r.postjobfree.com

Extensive research, process design & control and manufacturing experience in semiconductor industry. Proven ability to support design specifications and control, diagnose existing procedures, analyze test results and reporting, develop new and better approach for improvement, and manage projects priority.

Strengths:

• Project Management

• Analysis

• Problem-Solving

• Project Budgeting

• Responsive & Prompt Delivery

• Innovative

• Teamwork & Collaboration

• Communication, Interpersonal Skills

• Accuracy & Transparency

• Listen & Flexible

• Detailed-Oriented

• Acute Sense of Judgment

PROFESSIONAL EXPERIENCE

June 2017-Feb 2018: Senior Process Engineer, Massachusetts Bay Technology, Stoughton, MA

Provided a leadership to develop and fabricate RF thin film semiconductor devices. Established process integration procedure for 3 projects with well documented once onboard. Consulted and monitored operators during photolithography, plasma dry etching and wet etchings. Detected critical dimensions and recommended a solution to improve beam leads products by 40 % of yield.

• Participated in lean manufacturing improvement. Silicon nitride plasma etching, silicon plasma etching and wet etchings for different metal schemes were optimized which resulted in reduced process time and greatly improved wafer uniformity.

• Performed and monitored equipment startup, maintenance and optimization. Palladium silicide formation is very crucial for limiter diodes and PIN diodes. The power supply output was recommended and adjusted in order to improve formation efficiency.

• Created process integration, performed process improvement and yield improvement.

• Analyzed data and Statistical Process Control (SPC).

• Performed device simulation and design of engineering (DOE) for process improvement.

• Analyzed failure modes and effect analysis (FMEA).

• Implemented in quality assurance/quality control (QA/QC) for ISO 9001 quality management.

December 2016-June 2017: Engineering of Device Processing and Characterization, IQE, Taunton, MA

Provided technical support for material characterization and device processing. Conducted trouble shooting for characterization process procedures.

• Performed characterization for GaAs based Vertical Cavity Surface Emitting Lasers

(VCSELs) for cell phone face recognition in Iphone X.

• Participated in device processing: HBT, HEMT, FET.

• Conducted equipment maintenance and optimization, including PL, XRD, surface scan, Hall, ECV, Poloran, and WEP.

March 2008-December 2014: Project Manager & Project Engineer, Lighting Solutions Consulting (LSC), Albuquerque, New Mexico Led a team of engineers and technicians in the research of semiconductor devices and LED production project. Created detailed engineering design, project scheduling, execution plan and equipment justification.

• Established project budget plan and drafted work instruction for operation.

• Created process integration; implemented process improvement and yield improvement.

• Analyzed data and Statistical Process Control (SPC) during process improvement and production.

• Qualified new equipment for LED Fab, MOCVD reactors and characterization equipment for manufacturing.

• Trained over 20 engineers and technician for production within 2 years. May 2007-March 2008: Postdoc, Center for High Technology Materials, University of New Mexico, Albuquerque, New Mexico

Provided leadership for graduate students in compound semiconductor research group. Designed, processed and performed experimental tests for measurement and reporting.

• Designed new process flow for nano-structure fabrication and nano-scale pattern fabrication.

• Created 1-D grating for DFB Lasers by interferometric lithography and CHA AR HR coating.

• Analyzed and presented epitaxial growth, characterization and device processing experimental results and recommendation to research group at the University. The experiments include processing GaN-LED, characterized material device, and MOCVD growth and device simulation.

CO-INVENTOR ON INVENTION DISCLOSURES

• Two inventions led to a license granted to Glo, located in Silicon Valley and Lund, Sweden in 2006. In August 2017, Google also invested USD $15 million in Glo on nanowire LEDs

o Patent No.: US 8,188,513 B2 “Nanowire and Larger GaN-Based HEMTs” (Issued 2012)

o Patent No.: US 7,521,274,B2 “Pulsed Growth of Catalyst-Free GaN Nanowires and Application in Group III Nitride Semiconductor Bulk Material” (Issued 2009) EDUCATION

• Ph. D. Degree: Electrical Engineering, University of New Mexico, 2007

• Master’s Degree: Electrical Engineering, University of New Mexico, 2005 JOURNAL PUBLICATIONS

• “Unusually Strong Space-Charge-Limited Current in Thin Wires” A. Alec Talin, François Léonard, B. S. Swartzentruber, Xin Wang, and Stephen D. Hersee, Phys. Rev. Lett. 101, 076802 (2008)

• “Effect of threading defects on InGaN/GaN multiple quantum well light emitting diodes” M. S. Ferdous, X. Wang, M. N. Fairchild and S. D. Hersee, Applied Physics Letters 91, 231107 (2007)

• “Fabrication of GaN Nanowire Arrays by Confined Epitaxy” Xin Wang, Xinyu Sun, Mike Fairchild Steve Hersee, Applied Physics Letters 89, 233115 (2006)

• “The Controlled Growth of GaN Nanowires”, S. D. Hersee, X. Y. Sun, and X. Wang, Nano Letters Vol. 6, No. 8, P1808-1811, (2006)

o This research has just been highlighted in Nature Nanotechnology

• “Photoelectrochemical Etching Measurement of Defect Density in GaN Grown by Nanoheteroepitaxy” M. S. Ferdous, X. Y. Sun, X. Wang, M. N. Fairchild, and S. D. Hersee, Journal of Applied Physics 99, 096105 (2006)

• “Nanoheteroepitaxial Growth of GaN on Si (111) Nanopillars” S. D. Hersee, X. Y. Sun, X. Wang, M. Fairchild, J. Liang, J. Xu, Journal of Applied Physics, 97, 124308 (2005) SKILLS

• Simulation software

• Microsoft Word, PowerPoint, Excel

• Fluent in English and Chinese

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