Design Engineer

Tom Cheng, Ph.D. Eng. (Canadian citizen) Phone: +1-916-***-****

Email: ************@*****.***

CAREER OBJECTIVE

Seeking a position as an IC Design Engineer in area of Analog/Mixed-Signal and RF design Willing to relocate

PROFILE AND ACCOMPLISHMENTS

12+ Years Experience in Analog, RF and Mixed Signal IC Designs

15+ Years Experience as an Electronics Engineer in the Field of Microelectronics

Comprehensive Knowledge of Analog/Digital Electronic Devices, Circuit Design Principles, and Experience in using Design/Analysis Tools

Working Experience with a variety of Technologies such as Si and SiGes, CMOS and BJT

Good knowledge of GaAs and FinFET Technologies.

Good Knowledge of both Transistor-Level Design and System Level Design, Modelling, Specification, and Characterization

Good Knowledge of VLSI (design, layout, processing & packaging), ASIC Design, FPGA Design, Serdes Design

Excellent Troubleshooting & Analytical Skills

Outstanding Interpersonal & Team Skills

Semiconductor Relay Patent – Ireland and USA – 2004

Semiconductor Transparent Plastic Conducting Thin Film Patent – China – 1997 PROFESSIONAL EXPERIENCE

SHENZHEN INTER SECURITY INDUSTRIAL CO., LTD. 2015 - present Senior analog IC designer and Technical advisor – Abbotsford, BC

Involved in IC designs, including analog, mixed-signal and RF IC designs.

Provided technical advice and support to the electronics engineers on IC designs. Ensured new IC designs and projects align with application needs and technical standards. Responsible for introduction of latest advances in IC design technologies ESS TECHNOLOGY, INC. 2013 – 2015

Senior analog design engineer – Kelowna, BC

Designed different analog and digital regulators (LDO) with low noise and high PSRR on CMOS technology

Designed different Schmitt Triggers with high speed and low power consumption on CMOS technology

Designed low power (80μW), low voltage (1.2V) Sigma-Delta ADC on CMOS technology SHENZHEN QIANLONG ELECTRONICS CO., LTD. 2004 - 2013 Senior analog IC designer – Toronto, ON

Doing design research on new CMOS technology nodes such as 65nm, 45nm, 32nm and 22nm

Designed 60GHz power amplifier and LNA on 90nm CMOS technology

Designed low power wideband LNA on 0.13μm CMOS technology for WiMAX application

Designed 10 bit pipeline ADC (analog to digital converter) on 90nm CMOS technology for high speed, low voltage and low power consumption

Designed low power (140μW), low voltage (1V) Sigma-Delta ADC on 90nm CMOS technology

Designed high speed (100Ms/s, 4MHz bandwidth) Sigma-Delta ADC on 90nm CMOS technology

Conducted the design of half rate (5-GB/s) CDR (Clock and Data Recovery Circuit ) for optical receivers using 0.18μm CMOS technology

Be engaged in the design of PLL on 0.35μm CMOS technology NATIONAL MICROELECTRONICS RESEARCH CENTRE 1999 – 2004 Ph.D. in Electronics Engineering – Ireland

Researched and developed low power and high speed HDFET device with multi-valued logic function on SiGe technology. Reduced the numbers of devices in digital circuits about 33% and improved the speed more than twice (a US patent obtained for this design)

Involved in the design of ASIC on 0.18um CMOS technology including many logic blocks and physical designs. Performed and run layout until the best trade off found comparing with the logic design. Built project database to describe the behavior and structure of the circuit

Participated in the design of 32-bit arithmetic Logic unit on 0.25um CMOS technology. Performed major block design (arithmetic block, logic block, multiplexers and registers). Analyzed the circuit, simulate the design and prove that it functions correctly

Researched and developed molecular device constructed by doped fullerenes, La@C60. Nano- transistor created by controlled resistance and conductivity through applied electric field

Collaborated on European Research Union projects [SiQUIC (Silicon Quantum Integrated Circuits) and QIPD-DF (Quantum Information Processing Device Using Doped Fullerenes)] with partners including the University of Cambridge (UK), IBM Zurich Research Laboratory (Switzerland), and the University of Gothenborg (Sweden)

SHANGHAI HU-CHENG INDUSTRIAL GENERAL CORPORATION 1992 – 1999 Analog Designer and Team Leader – China

Designed a 1.9GHz Gilbert mixer for a cable tuner on 0.18μm CMOS technology

Participated in the design of 2.5-GB/s CDR (Clock and Data Recovery Circuit ) on 0.25μm CMOS technology

Designed LNA (Low noise amplifier) for telecommunication systems on 0.35μm CMOS technology

Current-mode CMOS DC-DC converter with on-chip current-sensing technique on 0.6μm CMOS technology

Researched and manufactured Semiconductor transparent plastic conducting thin film by PVD technology. Performed the design of key part of a planar displayer. Realized light weight, high transparency, low cost and low power consumption (a patent obtained for this design)

Wrote specifications, schedules and technical reports, and controlled budgets. Supervised technical teams and reported to general manager

SHANGHAI NORMAL UNIVERSITY 1988 – 1992

Assistant Professor – China

Taught quantum mechanics and solid-state physics IC DESIGN TOOLS/COMPUTER SKILLS

Cadence tools, Mentor graphics tools, Agilent ADS, Pspice, Protel, POSES, Quartus, Maxplus II, Silvaco TCAD Simulators

Verilog HDL, Verilog–A/AMS, C/C++, Java, Unix Shell Script (Sed, Awk etc.), Perl EDUCATION

Doctor of Philosophy (Ph.D.) in Electronics Engineering 1999 – 2004 National Microelectronics Research Centre – Ireland Master of Science in Solid State Physics 1985 – 1988 Bachelor of Science in Semiconductor Device and Technology 1981 – 1985 Shanghai University of Science and Technology – China AWARDS

Research Fellowship for Ph.D. Study and Research Work 1999 – 2004 National Microelectronics Research Centre – Ireland Awarded the National Natural Science Foundation Fund for the Research of 1992 – 1999

“Semiconductor Transparent Plastic Conducting Thin Film” Shanghai Hu-Cheng Industrial General Corporation – China

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