Lawrence DiFrancesco LD - Process & Production Engineer
719-***-**** cell
SUMMARY OF QUALIFICATIONS
Proven success in business development, business savvy, customer sensitive and “Hands-On” technically competent in Microelectronics wafer level packaging, CSP, +100 GHz bandwidth connectors and hi-volume SMT defect reduction using existing equipment in new and novel way
Worked in lab to develop innovative Wafer-level Fan-Out Packaging process with 25 um line/space design rules, 3-D packaging with integrated active-driver (SOS) substrate, 75 um laser drilled stacked via’s. Won multiple IR&D project funding, transferred to production active substrate and laminated substrate processes, (flying on F-22 Raptor, & SDI)
Invented, funded, managed several Micro-Channel Heat Exchanger projects & doctorial candidates (Stanford University) to address increasing thermal loading due to high-density micro-electronic packaging advances. Concept to Production thermal packaging technologies with over 5,000 watts/cm2 for military applications.
Hands-on lab work resulted in development of innovative processes exceeding industry standards in electro-plating chemistries, ultra-fine grain metal depositions in copper and nickel, deposition rates exceeding 1 mil/min, and enhanced photographic resolution performance and Copper Micro-Bump fabrication using existing industry equipment.
Developed technologies for wafer level chip scale packaging (WLCSP) production and SMT assembly using laser drillable, ultra-low dielectric polyimide polymer chemistry laminate with Dk = 2.9, Df = 0.0009
Won Hughes Aircraft Corporate Superior Award for 49 die Flip-Chip MCM package using KGD chips, 7 layer spin-on Polyimide/copper/silicon wafer-lever HDI process which was environmentally sealed to MIL-STD 883
Results-driven leader skilled in building high performance production teams at 350 person 24/7 multiple remote production sites reducing SMT flex-circuit assembly defect rate from 300,000 ppm to 25 ppm in 6 months using existing equipment
AWARDS and ACCOMPLISMENTS
Published 14 papers on Advanced Micro-Electronics/SMT packaging, PCB layout and SMT assembly technologies
Hold 4 patents and 1 international patent (Germany)
Main Contributor to SDI “Star Wars” Super Computer Project (flying on F-22 Raptor)
Project Leader of the Hughes/Delco Electronics Automotive Underhood Flip-Chip Technology IC Process development
Corporate Superior Performance Award recipient, Hughes Aircraft Co. 88,000 person, $5B annual company
Lecturer/Recruiter of Senior Level Electronics Engineering Courses at University California, Irvine, CA
Honorable Mention for Most Valuable Invention Award. Project displayed at GOMAC, several major publications
2 Projects published in Hughes Aircraft Co. advertisements
PROFESSIONAL EXPERIENCE
Rocky Connections, LLC & Creative Engineering Solutions, – Colorado Springs, CO May 97 to Present
Consultant - Privately funded R&D contracted design, fab & assembly company developing private-label disruptive technologies which were transferred to high-volume production sites. Multiple projects required generation of technology roadmaps, advanced design, engineering system analysis, design recommendations, research, and technical documentation. Created +100 GHz solderless PWB interconnect technology to meet multiple high frequency test, burn-in, production sockets and backplane interconnect products for multiple projects. Generated advanced electronic packaging processes, performed system analysis, 3D model generation, simulation, technical documentation, ensured projects were Design For Six Sigma (DFSS), and DFM, performed DOE analysis for process transfer. Converted several conventional package designs to Flipchip and CSP format.
Raised/managed $2.8M of venture capital funds for advanced tele-communications micro-relay (MEMS). 11 person. Created magnetic polymer chemistry for integration into laser drillable PCB, multi-layer fine-line laminates with +100 GHz interconnect system for high-volume manufacturing company using advanced high-speed electroplating process (1 mil/min).
Operated and improved performance of industry standard equipment in the following technologies and processes:
Electroplating chemistry - copper, nickel, gold metal baths, upto 1 mil/min, >400 ASF (10x industry standard using existing equipment)
Photolithography – dryfilm photoresist, liquid photoresist – spin coat, immersion coat, spray coat
Molding equipment – single cavity injection mold, pour casting, UV cure materials
Coating equipment – roll laminator coater, vacuum coater, spin-coater, roll-to-roll coater
Pressing equipment – laminator press, vacuum laminator press
Bonding process – wire bonding – ball & wedge, flip-chip assembly – indium bump, SAC & copper pillar fine-pitch soldering flux-less soldering, & diffusion bonding – room & cryogenic temp
SMT package type - CSP, BGA, QFN, DFN soldering, flux-less soldering, & diffusion bonding – room & cryogenic temp
Machining equipment – Micro-Via Laser Drilling – CNC vertical mill, CNC lathe, manual mill and lathe
Design, Fabrication & Assembly of fine tolerance electronic hardware and machinery
CAD / CAM software design & modeling software, 2D & 3D computer modeling, electronic performance
Substrate material – fine-line thickfilm, fine-line thinfilm ceramic, sapphire, & polyimide laminate substrate (1 mil line/space)
Particle Interconnect Corporation, Colorado Springs, CO June 96 to May 97
Chief Operating Officer, Founder
Raised/managed $1.5M venture capital, responsible for creation, technical leadership and business management of a highly-automated, high-volume roll-to-roll PCB production line (31 person) utilizing a unique production process for a patented technology. Successfully setup a high-volume production process for disruptive technology using revolutionary electroplating techniques (1 mil/min, >400 ASF) for private investor group within 3 months of operations
Sheldahl Inc. Aberdeen, SD March 95 to May 97
Senior Technical Specialist
Technical Program Manager with overall responsibilities for 2 high-volume, flex circuit PCB SMT 24/7 contract assembly sites. Raised productivity and lowered defect rate from 300,000 ppm to 25 ppm by implementing DOE, DFM and SPC on multiple SMT production lines using existing equipment
Particle Interconnect Partnership, Minneapolis, MN March 91 to March 95
Senior Scientist
Developed new concepts using advanced packaging technology for electronic packaging, sockets and connectors in fine-pitch SMT products, BGA 0.5mm, QFP, QFN 0.2mm, flip-chip assembly 0.15mm. Used new technology for multi-discipline automatic test equipment (ATE)
Hughes Aircraft Company, Fullerton, CA January 82 to March 91
Sr. Member of Technical Staff / Research Scientist (SECRET and Above Clearance)
Project Leader of multi-year IRAD CSP and Flip-Chip packaging development for 7 metal layer silicon substrate MCM. Project’s main goal was to develop necessary tools to support software, hardware, computer modeling parameters, and test equipment to demonstrate producibility. Product flying on F-22 Raptor. Project developed environmentally Sealed CSP Process to meet MIL-STD 883C. Reported directly to Corporate R&D Director. Performed technical appraisal of MCC technology development for GMAC/Hughes/Delco, $4M/annual membership fee
EARLY CAREER
Sr. Analog Engineer, servo systems, read/write path, with Century Data Systems Advanced Systems Programs
Analog Engineer, high speed data bus (fiber optic & copper), with Hughes Aircraft Co. Irvine CA
R&D Engineer, telephony analog circuit design, switching power supplies, solid-state-relay, college interview/recruiter team member with Anaconda Telecom, Microelectronics R&D Lab, Anaheim, CA
CREDENTIALS
UCLA, Los Angeles, CA 18 of 24 units completed, Masters of Science in Material Science
CalPoly, San Luis Obispo, CA ***DOUBLE MAJOR***
Bachelor of Science (BSEE) - Electrical Engineering
Bachelor of Science (BSEL) - Electronic Engineering
Chabot Jr. College, Hayward, CA Associate Degree, (AAET) - Electronic Technology