Sign in

Engineer Manager

San Jose, California, United States
November 28, 2017

Contact this candidate


Robert C. Doig


SUMMARY: • Patent holder of database technology used in industry standard data

transfer API ‘Open Access’.

• Patent holder in the area of GUI, ‘Man machine Interface’.

• Patent holder for Open Access fast file plugin

• Extensive experience in development of routing, placement, optimization, translation and graphical editing of Printed Circuit Boards and IC layouts.

• Proficient with C, C++, TCL, Linux, Windows, MFC classes, QT, multi- threading (POSIX, OMP), Perforce, Citrix, VNC, EOD, NX, jabber, webex, Code Collaborator

• PhD in Computer Aided Design with 30+ years experience in the industry.


• Nov 2010 – 2017

Senior Staff Engineer, Springsoft/Synopsys, Mountain View CA


Remote co-operation with Taiwan engineers

Rewrite of Stream format to Open Access input mechanism for speed

Implementation of fast Laker hierarchical redraw system for Open Access

Implementation of fast interruption system

Implementation of new file plugin system for Open Access in Laker

Design and implementation of command checking/documentation system.

Custom Compiler:

Remote co-operation with Armenian engineers

Implementation of fast Custom Compiler hierarchical redraw system for Open Access

Speedup and redesign of existing redraw system in Custom Compiler

Assisted in writing and presented company debugging C++ course

Implemented more efficient Highlighting and Selection renderering

Research and implementation of ways to reduce bandwidth traffic over X

Implementation of WinFit caching

Design of GUI improvements

Implemented library editor dialogs in TCL

• July 2008 – Nov 2010

Architect, AnalogRails, Chandler AZ

In charge of creating infrastructure database based on Open Access for analog design tool.

Headed a team of 7 engineers. Designed underlying UI system and used Qt for the GUI.

• Feb 2005 – July 2008

Architect, Blaze DFM, Sunnyvale CA

Telecommuting from Atlanta GA and subsequently Sedona AZ. Working on next generation physical data storage and the infrastructure for the Blaze products. Use of OA database in conjunction with more specialized (and compact) data storage. Created TCL based UI from

scratch. Implemented command checker software: syntax checks, licensing, and automatic GUI dialog generation. Implemented QT based viewer and GUI package. Responsible for developing and maintaining the Blaze hybrid depot data system.

• Sept 2003 – Feb 2005

Architect, Magma Design Automation, Santa Clara CA

Telecommuting from Austin TX and subsequently Atlanta GA. Working on the Magma database with regards to speed improvement and data compaction. Initially concentrating on maintained hierarchy problems.

• Jan 2002 – July 2003

Senior Architect, Cadence Design Systems, Inc.. Austin, TX

Telecommuting from Austin. Working on the interface between Open Access and ‘First Encounter’ floorplanner. Patent awarded for Genesis database technology # 6,529,913. Completed research project into replacement database for GDSII format using Genesis technology. Created a new level of data compaction superior to original Genesis technology.

• Feb 2001 – Jan 2002

Senior Architect, Cadence Design Systems, Inc.. Austin, TX

Telecommuting from Austin. Working on Genesis database as first version of Open Access technology. Second team working in parallel to produce new c++ apis on top of Genesis technology.

• Nov 1999 - Feb 2001

Senior Architect, Cadence Design Systems, Inc.. San Jose CA

Responsible for incorporating Genesis database into NANO project ( Floorplanner)

• Feb 1997–Nov 1999

Senior Architect, Cadence Design Systems, Inc. San Jose CA

Working on next generation database for Cadence tools (Genesis). Initial project justified by extensive reports to management regarding comparisons between the different databases in Cadence. The new Genesis database is based on the SILICONQUEST database mentioned below.

• Feb 1994 - Feb 1997

Architect, Cadence Design Systems, Inc.. San Jose CA

Hired to design and develop a front end Gate Array Floorplanner

(SiliconQuest) to replace current tool (Preview). Database and UI designed from scratch using Microsoft Foundation Classes in C++. Concurrent development on Windows NT and Unix using a WXL tool (Bristol Technology). Technical lead, directly supervising three engineers and technically in charge for the entire project. Designed database, Flow Manager tools and the graphical user interface.

• Feb 1993-Feb 1994

Senior Engineer grade 8, MENTOR Graphics, Inc. San Jose CA

Hired as technical lead for ASICPLAN, a front end Gate Array Floorplanner evolved from CHIPS: a Texas Instruments floorplanner. Made improvements in database capacity and run time performance. Also worked on functionality and graphical flow manager.

• Jan 1992 - Feb 1993

Architect, Cadence Design Systems, Inc. San Jose, CA (previous company acquired by Cadence)

Responsible for engineering the usability of COMPOSE into PREVIEW, Cadence's back end floorplanner tool. Continued development and support of COMPOSE (see below).

• Dec 1987 - Jan 1992

Senior Software Engineer/Project Manager, Valid Logic Sys. San Jose CA

Designed and developed a symbolic placement and routing editor for Standard Cells and Blocks (COMPOSE). User interface subsequently adopted as company standard for all tools. Supervised up to a dozen people as project grew. Also designed and implemented a Foreign Netlist interpreter program for converting any netlist format to VALID format (programmable). Worked in design and supervisory capacity on Standard Cell placement and routing, one-dimensional

compaction, Power Routing, force directed placement and a variety of placement improvement algorithms. Added BUS routing/manipulation and on-screen line interactive router. Started front-end floorplanner project for large Gate Array chips.

• Aug 1985 - Dec 1987

Senior Engineer, FACTRON/Schlumberger (previous company acquired). Scotts Valley, CA

Designed and developed Standard Cell tools: automatic placement, routing and editing. Automatic logic minimization and synthesis from truth tables.

• Nov 1983 - Aug 1985

Senior Engineer, Applicon Inc. Aptos, CA

Design and development of automatic placement and routing for Gate Arrays. Interactive graphics completion editor. Design and development of netlist universal translator program.

• June 1981 - Nov 1983

Senior Engineer, Gould Modicon, Andover MA

Responsible for developing and managing MODVUE – a graphical display language system for process control (Patent holder in this). Supervising three people. The user defines graphical displays interactively on a color monitor, which represents control panels in his factory. These displays can be made to show factory data in real time via Process Controllers, The user interacts with a touch screen on the monitor, pressing soft buttons and switches. Patent awarded for ‘Man Machine Interface’ # 4,570,217

• Oct 1979 - May 1981

Senior Programmer, GEC Computers Ltd, London UK

Designed and developed automatic routing algorithms for multi-layer printed circuit boards. Also wrote programs for interactive artwork editing and manual input language. Authored schematic input and output software. Supervision and instruction of PCB layout technicians using the system.

• Sept 1976 - Sept 1979

PhD Research student in CAD, RGIT Aberdeen, UK

Thesis: "Automatic design of meandering Thin Film circuits". Planarity analysis of networks. Photoplotter fracturing algorithms. Undergraduate lecturing/tutorial work in school of Electronic and Electrical Engineering.


• Robert Gordon's University Aberdeen,UK

Ph.D. in Computer Aided Design

• Robert Gordon's University Aberdeen, UK

B.Sc.(Honours) in Electronic Engineering

• Robert Gordon's University Aberdeen, UK

B.Sc. in Electrical and Electronic Engineering

Contact this candidate