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Project Information Technology

Madhya Pradesh, India
November 29, 2017

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Abhishek Verma


Electronics & Communication


Mobile no.: 851*******

UG Fourth Year skype id: Male

PDPM Indian Institute of Information Technology Design & Manufacturing, Jabalpur

Examination University Institute Year CPI/%


PDPM IIIT D&M Jabalpur PDPM IIIT D&M Jabalpur 2018 7.0/70% Intermediate/+2

Board of High School and In-

termediate Education, Uttar


Stepping Stones Intermediate Col-


2013 88.80%


Central Board of Secondary Ed-


Subhash Public Senior Secondary


2011 9.0


Microprocessor Based Fault Diagnostic and Control System (June-July 2016) The development of Microprocessor Based Control and Fault Diagnostic System for tap changer electric locomotives and its major objectives are as follows:

To reduce the number of electromagnetic relays and interlocks by providing software based control logic using microprocessor.

To provide the fault information in text form, status of various interlocks and input command switches displayed on the driver’s desk in each cab.

Traction/braking notch position to display through seven segment indication on the driver’s desk in each cab.

Analog inputs measurement and control of operations based on these measurements by microprocessor. PROJECTS

Microwave detecting device (Aug.-Nov. 2016)

Course project j Guide: Dr. Biswajeet Mukherjee (PDPM I.I.I.T. D&M Jabalpur)

Designed a pocket size device that can detect any wavelength that is lie in microwave region using 555-timer I.C..

Electronics components such as BJT, resistors, inductors, capacitors, 555-timer IC, op-amp (IC1 CA3130), LED, piezo-buzzer and 12 V battery are used for the manufacturing of the circuit for the microwave detecting device.

This device work in the range of two to three meters. Geo orbital wheel (Jan.-April 2017)

Course Project j Guide: Dr. Harish Hirani and Dr. Sujoy Mukherjee (PDPM I.I.I.T. D&M Jabalpur)

The objective of the project is to optimize the cost of making a normal bicycle electrically driven just by replacing the front wheel of the bicycle.

This project is inspired by the actual model of Geo orbital wheel and redesign that model to reduce its cost.

Solidworks and Pspice are the tools that are used for the simulation of the new model. Internship

TOPIC: TFET Study and Simulation (low power devices) (June-Nov. 2017) Project Based Internship j Guide: Dr. Dheeraj Sharma (PDPM I.I.I.T. D&M Jabalpur)

The tunnel eld e ect transistor (TFET) is a device which is operated at very low supply voltage and use tunneling mechanism for conduction.

The objective of this project is to optimize the device performances i.e. D.C./R.F. performce by changing the structures as well as doping mechanism of TFET.

Circuit level implementation of TFET is in process using SILVACO and CADENCE. Research Experience and Exposure to VLSI Designing and tools

Device Simulation and Characterization j Guide: Dr. Dheeraj Sharma (PDPM I.I.I.T. D&M Jabalpur)

Perform several simulations of various existing devices like MOSFETs, BJTs and TFETs etc and nd out their characteristics i.e. DC Analog/RF.

Redesign the existing TFET structure (2-D model) to overcome the issues related to low On current, high ambipo- larity and random dopant


Derive its characteristics using SILVACO (TCAD tool). Analog and Mixed Signal Circuit Designing j Guide: Dr. Dheeraj Sharma (PDPM I.I.I.T. D&M Jabalpur)

Designing of CMOS two stage op-amp.

Tool: Cadence

Virtuoso for schematic design.

Spectre for simulation purpose.

Assura for layout designing.

Technical Skills

Programming Languages Java

Statistical Softwares MATLAB, Lab View

VLSI Designing Softwares SILVACO, Verilog, Cadence Other softwares Latex, Origin, NI Elvis, MSO ce

Key Courses Undertaken

Fundamental of Electrical and Electronics, Fundamentals of Computing, Engineering Drives and Devices, Digital Electronics and Microprocessor Technology, Electronics Devices and Circuits, Signals System and Network, Control System, Instrumentation and Measurement, Linear Integrated Circuits, Principle of Communication, Analog-IC Design and VLSI-IC Design

Extracurriculars and Achievements

Top 99.18 percentile in XIIth Board examination (2011-13)

Awarded MHRD sponsored Merit Cum Means Scholarship during academic year 2014 15, 2015 16, 2016

- 2017 and 2017-2018.

Won inter school Maths quiz in XIth class.

Member of the Electronics Club, PDPM IIITD&M Jabalpur (2014-2017)

Founder of RUBIX club (informal club) and active member Electronics club at IIITD&M Jabalpur. Publications

Dharmendra Singh Yadav, Abhishek Verma, Dheeraj Sharma, Sukeshni Tirkey, Bhagwan Ram Raad,\Comparative investigation of novel hetero gate dielectric and drain engineered charge plasma TFET for improved DC and RF performance," Superlattices and Microstructures, Elsevier, vol. 111, pp. 123-133, Nov. 2017. Reference

Dr. Dheeraj Sharma

Assistant Professor (Electronics & Communication Engineering, PDPM IIITD&M Jabalpur) E-mail:

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