Post Job Free
Sign in

Electrical Engineer Software

Location:
Plano, TX
Posted:
January 29, 2018

Contact this candidate

Resume:

James Hudson

**** ****** **, *******, **. *****

214-***-**** (m)

*****.********@*****.***

PROFILE

8+ years at TI, determining the root cause for the failure of mixed signal devices

Utilizing the data provided from ATE testers and working with AEO to develop and use bench test setups, have replicated customer setups for many devices and then performed root cause analysis

Used Cadence for circuit analysis and FIBs for micro-circuit edit to isolate failures and deprocess the devices to silicon layer by layer to document any anomalies on any of the layers

EXPERIENCE

Texas Instruments, Dallas, TX 01/10 – Present

Failure Analysis Engineer

Deployed 3D printer in Tucson (TDAO) for the use of custom 3D printed Failure Analysis solutions

oThis involved setup, upgrade of software and hardware, instruction on use and 3D model creation training in AutoCAD and SolidWorks

Provide root cause analysis for analog/mixed-signal device failure for customer return/reliability devices

oThis involves circuit analysis using Cadence for schematics and layouts along with simulations

Use the DDAO lab for deprocessing of devices for isolation, and documentation of the failures/design changes needed

Used PSpice, ModelSim, Mat LAB, NI LabVIEW, EAGLE cad, Scilab, NetBeans and other programs to create solutions to any issues for the lab

Use several tools including but not limited to probe stations, O-scopes, test fixtures, focused Ion beam, function generators, PEM/OBIRCH isolation and various software interfaces to communicate with devices in EVAL boards

Use GUI/command line interfaces to communicate with TI devices and eval boards to replicate the customer failing condition for root cause failure analysis

Maintain lab equipment and tools for other lab engineers

oDevelop additional lab tools and techniques to improve performance and efficiency of FA

Create EVAL setups to recreate the failure to document root cause for design change

oThese procedures can include creating circuit on bread boards/PCBs to excite the failure internally (inside of the device) for micro probing or isolation

Created and currently maintain the socket/eval/information system for DDAO stored on a VM server

oThis includes modifying code for bug fixes and any improvements to the system

Providing software/hardware support for the DAS organization for issues that come up from the tools that any of the engineers use

Researched and deployed the 3D printing initiative in TI Quality utilizing an open source hardware and software

Created an automated ventilation system for the fume extraction system for the 3D printer

Work with micro-controller based hardware to create new systems and tools for custom solutions

Use Solid works and AutoCAD to design and then 3D print socket/EVM solutions for FA and AEO

Work with product teams on best practices for EVM solutions for FA and when needed use Altium to create custom circuit boards for bench solutions

Created and maintain the DAS and the Quality Lab Services websites on a custom windows 8 server installation that utilizes Apache web service, PHP, Python, PERL, JavaScript

oThis server has many functions for the LABs and also hosts the Audit data for all DAS labs

Created custom software/hardware for the replication of fail modes for failing devices submitted for FA. Then used the custom solutions for root cause analysis

Trained several NCG and New experienced hires in the process of root cause analysis and 3D printing design

Was the recipient of the DAS Quality Improvement Award and the DAS symposium Best new FA Technique Award for using the 3D printer to cut outside TI fabrication costs by more than $150K

Expert in hardware and software including microcontrollers, servers, Linux, Windows, MySQL, C++, Java, JavaScript, Pascal, Raspberry pi, Arduino, SolidWorks, Hardware/software Design, AutoCAD, Embedded systems used in test applications, customer designs, and personal projects

Radisys Corp., Hillsboro, OR 06/08 – 08/08

Service Tech (Summer)

Proved board level failure rework, including flashing firmware and replacing components for customer hardware

Used test fixtures to determine the failing device and replace using a rework station

Performed board level analysis to determine the root cause of the failure and re-tested after failure swap of failing devices

EDUCATION

BSEE, Prairie View A&M, Prairie View, TX, 12/09

oFocused on electronics

oSenior Design project was to design bi-directional buffer in Cadence with extraction and simulation

oProjects of note: Switch mode power supply, regulated power supply, Xilinx FPGA programming, and MatLab simulation



Contact this candidate