Rashmi Mathan Kumar
*** ****** **., *** ***, Naperville, IL 60540
******.******@*****.***
https://www.linkedin.com/in/rashmimathankumar
SUMMARY
Computer Engineering graduate proficient in C++ and Java with strong understanding of algorithms, data structures and object- oriented programming and project experience in Digital IC Design. EDUCATION
Master of Science in Computer Engineering (Electrical Engineering) October 2016 Arizona State University, Tempe, Arizona
Relevant Courses: Computer Architecture, Hardware Design and Verification Language, Operating Systems Bachelor of Engineering in Electronics and Communication May 2014 SSN College of Engineering, Chennai, India
Relevant Courses: Data Structures and Object-Oriented Programming, Computer Networks, Microprocessors SKILLS
Programming and Scripting Languages: C, C++, Java, MATLAB, HTML, CSS, Python Java Technologies: JDBC, Servlets, JSP, Web Services, Frameworks Hardware Description and Verification Languages: Verilog, System Verilog ASIC Design Tool: Cadence Virtuoso
Simulation Tools: Active-HDL, Riviera Pro, ModelSim, HSpice Operating systems: Windows, Linux
EXPERIENCE
Intern at SP Robotics, India December 2013 - April 2014 Design and Development of a Human following robot:
•Part of the 3-member team. Played an active role in programming the robot
•Implemented Triangulation using transceivers (Zigbee modules); Used X-CTU to measure RSSI (Received Signal Strength Indicator) values of signals transmitted between transceivers
•Used Arduino to program ATmega328 chip in Arduino Duemilanove board ACADEMIC PROJECTS
Inventory Database Management using JDBC Fall 2013
•Created a Java Project, InventoryDatabase in Eclipse IDE and a table Inventory in SQL Command Line
•Added .java files to the Java Project that contains statements to load the driver and connect to the database, add a new item to the inventory, search details about an existing item in the inventory and update an existing item’s details in the inventory Employee Web Application using Servlets Fall 2013
•Created a Dynamic Web Project in Eclipse IDE
•Added .html files and Servlet Classes to the project that accepts a Username and Password and displays an Employee Menu that consists of Employee Show, Employee Search, Employee Insert and Employee Update options Performance measurement of memory hierarchy Fall 2014
•Wrote a C program to access memory (linear and random pattern) and measured the average access time of L1, L2, L3 cache and main memory
•The average access time was measured by measuring the average access time to an array Performance evaluation of cache replacement policies using SimpleScalar Fall 2014
•Modified the SimpleScalar source code (using C Programming in Linux environment) and implemented partial-LRU replacement policy and 2-bit SRRIP with Hit Promotion algorithm
•Ran benchmarks with various cache configurations and compared their performance with LRU and FIFO policies ALU Component Design in Verilog Spring 2015
•Constructed an ALU (Arithmetic/Logic Unit) for a 16-bit processor by creating 4-bit ripple-carry adder, 16-bit carry-select adder, 16-bit multiplier and 16-bit shifter modules in Verilog using Active-HDL
•Tested the ALU by creating a testbench in Verilog that verifies all ALU operations 16-to-1 Integrate-and-Fire (IF) Neuron Design Spring 2015
•Designed (schematic and layout) a digital spiking neuron that integrates the input from 16 neurons and fires an output neuron
•Performed DRC and LVS on the design and extracted netlist using StarRC and measured delay of the design using HSpice Standard Cell library design and logic path implementation using 32nm PDK Spring 2015
•Created a standard cell library of universal gates with Schematic, Layout and Symbol views using Cadence Virtuoso
•Implemented a logic path using standard cells from the library and optimized the delay of the logic path to achieve minimum path delay