Engineering Electrical

Shashank Lele

**** ******** ***** *** *** • Dallas, TX 75206 • 469-***-**** • **************@*****.***

OBJECTIVE: Seeking a full-time entry-level opportunity to further my knowledge of verification planning and testbench development using Verilog HDL, System Verilog.

EDUCATION: Southern Methodist University (2015-17)

Bobby B. Lyle School of Engineering

Master of Science in Electrical Engineering (GPA 3.1/4.0)

University of Mumbai (2008-12)

St John College of Engineering and Technology

Bachelor in Electronics and Telecommunication Engineering

TECHNICAL EXPERTISE:

VLSI Design Cadence Virtuoso, Synopsys DC, Xilinx Vivado, Cadence Encounter

Hardware Description Language Verilog HDL, System Verilog

Computer Programming Language C, Python

Application Software MS Office, Windows 7/10

ENGINEERING PROJECTS:

UVM Verification of 2x2 Ethernet Switch 02/2017 - 05/2017

Logic design and implementation for Ethernet switch DUT using Verilog HDL

Development of design verification environment using UVM methodology

Generate and run test cases using System Verilog and OOP to test module functionality.

System Verilog coding for Monitor, Driver, Sequencer and Checker and TLM.

8-bit Priority Encoder 04/2017 - 05/2017

This project was part of my Masters Curriculum for the class VLSI Algorithms.

RTL design of DUT and test logic done with test-bench for all the possible outputs in Verilog HDL

Optimization for area, power and timing constraints using Synopsys DC

Place and Route cells for digital layout for power rails and cell placement using Cadence Encounter.

Database Application using Python 03/2016 - 05/2016

Developed an existing database for names and the respective contact numbers.

The logic included displaying and adding or deleting the records.

Saving the database entries in a CSV file.

16x16 Crossbar Switch 08/2015 - 12/2015

Layered approach for schematic and layout using 2:1 MUX

Error-free compilation and simulation of circuit at every stage of design

Successful Design Rule Checking (DRC) and Layout Vs Schematic (LVS).

Testing was done using Cadence Virtuoso and 180 nm specification.

PROFESSIONAL EXPERIENCE:

Safe-Tronics Automation Pvt Ltd, Project Engineer, Mumbai, India 03/2013 - 07/2015

Lead a team of colleagues to perform commissioning and preventative maintenance and diagnostics for Fire and Gas systems.

Successfully service repairs, replacements and calibration on the field devices and control room panel to ensure efficient functioning of the process plants.

Assist in system startup and coordinate in system installation at the client site.

Consult customers about the appropriate choice of devices as per specifications and other qualifications.

Prepare and submit appropriate test reports of system maintenance for future reference.

Discuss troubleshooting approach with different vendors and service providers.

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