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Manager Electrical Engineering

Location:
Boulder, CO
Salary:
100000
Posted:
October 04, 2017

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Resume:

Sudeep Dattatraya Kulkarniirlekar

Boulder, Co, **302 ac2lq5@r.postjobfree.com 317-***-**** www.linkedin.com/in/sudeep-kulkarni-91b187a1/ EDUCATION

University of Colorado, Boulder

Master of Science Electrical and Computer Engineering, GPA 3.6 May 2018 Courses: Principles of Embedded Firmware, Programmable system on a Chip, Search Engine & Analysis of Higher Dimensional Datasets, Network Systems, IoT Firmware Design, Low Power Embedded Systems Veermata Jijabai Technological Institute, Mumbai, India May 2016 Bachelor of Technology in Electrical Engineering, Secured First Class with (GPA 7.72/10) Relevant Coursework: Object Oriented Programming, Data Structures and Algorithm, Digital Design, MCU programming, SoC, Calculus, Probability Theory, Robotics, DSP

SKILLS

• Programming/Scripting Languages: C, C++, Python, Java, Perl, SQL, TCL

• Dataflow Languages : Verilog, VHDL, SystemVerilog, SystemC

• Boards: BeagleBone, Altera BeMicroMax 10, Altera DE1-SoC, ARM cortex-M3, FRDM KL25Z, Smartfusion, PYNQ, Blue Gecko

• DMA, UART, SPI drivers for FRDM, Beaglebone Black (Firmware Design), GPUs, FPGAs

• DDR 1/2/3, SDRAM, HSTL SRAM, RLDRAM, CFI, Google page rank, UDP, TCP/IP Protocols

• Other: MATLAB, CUDA, vivado, Eclipse, PCB design(Altium), Altera Quartus, Qsys, Libero, Git, Linux, Test Benches, RTOS, YOCTO, Version control, TensorFlow, Torch, Caffe, Debugging and Error Handling, Altium, LTspice,

• ADC, UART, Bluetooth, SPI, I2C for BGM121 (Bluetooth module) PROFESSIONAL EXPERIENCE

XILINX, San Jose (FPGA Architecture Intern) May-August 2017

• Automated the generation of Devices by creating Mondrian Tool. Developed a GUI for device design on the combination of inputs using Python and Tkinter. The tool is being widely used in company.

• Created a XML Viewer tool. Solved the Complex API problem by breaking it down and making Controller the agent of communication. Used Tkinter for creating the GUI which has Infinite Focused zoom, local and global functionalities, mouse bound, screenshot, information retrieval functionalities. (Tool is being used in RTL Integration, Speed Analysis, Verification)

• Worked on solving negative slack problems for devices, proposed a software solution by re-routing (Developed TCL Scripts)

• Solved Package pin Assignment Problem. Created a prototype of Package Viewer Tool. Used large and complex data structures and Algorithm for information retrieval. Used Regex, pandas, Yaml libraries in python to automate the feature. PROJECTS

Ø SPI, UART, DMA Drivers February 2017

• Designed a robust, portable, reliable software design for various functionalities of ARM based FRDM KL25Z and Beaglebone Black in Embedded C. Learned about various transfers DMA and SPI communications with Nordic chip, Data Buffer. Developed drivers for UART on the FRDM KL25Z controller in C. Integrated a circular buffer with the UART driver to support logging function. The ON-BOARD LEDs were controlled using this UART interface. Controlled LED’s blinking with PWM. Ø DE1_SoC (High bandwidth interconnect and flexible) March 2017

• Learned to build hardware Cyclone 5, PYNQ and to connect HPS to FPGA. Integrated software with hardware using monitor program, embedded design suite. Carried out embedded software development on the board using python, wrote testbenches Ø Build System and Version Control(BeagleBone, FRDM-KL25Z) January 2017

• Programmed various functionalities in C, like memory_move, memory_set, integer to ascii, ascii to Integer, big to little endian. Developed Makefile for the build system. Used compile-time switchs to switch into a particular architecture before compilation. Used git for the version control (Solved merge conflicts, when multiple commits with different sources) Ø BeMicroMAX 10, Smartfusion January- February `17

• Used the software and hardware configured pushbuttons to toggle LED’s and display team members’ names on the console using Altera Quartus, Qsys and Eclipse, NIOS 2 softprocessor. Used Verilog dataflow language for digital design.

• Fabricated a complete System on Chip and implemented an 8 bit counter with a soft-processor (NIOS II), onchip RAM, external SDRAM, onchip Flash, SPI for accelerometer, Modular ADC using Altera Quartus, Qsys, Eclipse.

• Configured the Smartfusion SoC_MSS peripherals using Smartdesign_MSS. Monitored the voltage across the potentiometer by setting voltage specific ACE flags. Explored the Smartfusion’s Ethernet capabilities, by hosting a small webpage. Configured the potentiometer and LED blinking functionalities. Performed timing analysis using SmartTime. Ø Music Genre Classification November 2016

• Extracted features of 728 songs in the database using ma toolbox. The song of 3 minutes upon the feature extraction gives about 1.5 million samples. Implemented random projection to reduce these samples to 400. Calculated distance of each song from other by K-L divergence method to get a similarity matrix. Classified the songs by using 5-fold cross validation and kNN classifier on MATLAB which was 80% efficient. Improved accuracies of classification, by using combination of different dimension reduction technique like FJLT and PCA, G1C with the n-fold cross validation and kNN classifier.



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