Greg Baker
Santa Cruz, CA *****
**********@*****.***
SUMMARY
Energetic engineer, seasoned in research, design, development and testing of real-time, multi-threaded, embedded-C firmware, C++ GUI software, and algorithms for feedback control and signal processing. Proficient creating scripts to collect, generate, analyze, and visualize data. Multi-national team oriented and naturally inquisitive
C / C++
MATLAB / Simulink
Serial Communication
Real-time SW
SW / FW
Control Systems, Algorithms
Visual C++ / Python / Linux
EXPERIENCE
Infinera Inc, Sunnyvale, California 3-17 to 9-17
Firmware Engineer (Contract)
Design and implementation of Linux firmware
Lumentum Inc, Milpitas, California 2016-2017
Staff Firmware Engineer, CFP2 100G Optical Transceiver
Reduced startup time of module from 20s to 10s by altering TEC control algorithm
Supported requests for feature modifications and bug fixes in ARM firmware
Toshiba-Western Digital, San Jose, California 2010-2016
Toshiba Staff Software Engineer HDD R&D, Self-Servo Control, 2015-2016
Created Matlab GUI streamlining the design and tuning of HDD digital notch filters. Continuous time open loop frequency responses for a batch of drives, could be compared to simulated open loop responses for a given filter design, to achieve the closest match to desired performance. Upon final design, discrete time filter coefficients were computed and downloaded to firmware for verification of real-time control performance.
Identified and corrected existing errors in firmware preventing accurate removal of aliased frequency components from calculated Bode frequency response
Toshiba Staff Software Engineer HDD R&D, Spiral Write Control, 2012-2015
Converted underlying MS VC++ MFC code of large-scale manufacturing-line Windows GUI, originally designed by WD, to manufacture Toshiba’s drives. This application supervised and controlled complex electromechanical machinery writing the initial signals on hard-drive platters defining the data tracks, and recorded all relevant electrical and mechanical measurements
Analyzed and remediated HDDs failing to pass production-line performance metrics by inspecting log files, finding and fixing software imperfections, and continuously improving machine-control algorithms in striving for an ultimate yield of 100%
Tuned PID compensators for optimal control of servo arm upon changes in track format
Supported commission of SPW production equipment on production lines in Asia
Devised and implemented supervised learning algorithm to improve servo arm control reducing average tracking error by 5%
Improved algorithm used to detect position of ramp on HDD platter, reducing false detections by 10%
Western Digital Staff Software Engineer HDD R&D, Spiral Write Control
Supported MS VC++ MFC-based, multi-threaded GUI, that supervised and controlled a complex electromechanical tool that wrote magnetic signals on magnetic HDD platters defining the data tracks during the manufacturing process
Designed, developed Matlab/HTML based factory-wide GUI, and companion tools, automating the collection and display of production line performance metrics
Designed, developed a feed-forward control algorithm, and companion tuning tools, for adding eccentricity to spiral patterns written on HDD platters
Streamlined the new track-format development process, combining a variety of ActiveX and Matlab tools and components into a single utility, improving team productivity
Watlow Electric Manufacturing, Watsonville, California 1992-2009
Senior Firmware Engineer, Industrial Control, and Windows GUI Engineer 2000-2009
Research and development of PID control algorithm improvements for industrial process control applications
Designed, developed tested key elements of full-featured Windows-based GUI for industrial process control
Created Windows’ MODBUS serial and MODBUS-TCP/IP communication components.
Proposed and lead to completion the design and development of a controllability test platform for simulation of arbitrary plants with dead time; then used it to improve in-house control algorithms, and to conduct a competitive analysis of process controllers
Firmware Engineer 1992-2000
Developed embedded firmware for CLS-4,8,16 Loop Series PID controller
Designed, developed and tested all key firmware components
Met with customers and factory personnel to advise on setup and tuning for optimal control performance
EDUCATION
Master of Science, Engineering - Control and Digital Signal Processing
San Jose State University, San Jose, CA
Bachelor of Science degrees in Physics and Geophysics
University of California, Santa Cruz
ADDITIONAL INFORMATION
M.S Thesis “PID Tuning of Plants with Time Delay Using Root Locus”, http://scholarworks.sjsu.edu/etd_theses/4036/, numerical analytic technique that can display the true paths of closed-loop poles in root locus diagrams, for time-delay systems
U.S. Patent Number 5,220,504 – Acoustical Evaluation of Porous Material Properties