Quality Control Engineering

To enhance my knowledge and capabilities by working in as dynamic organization that prides itself in giving substantial responsibility to new talent.

Programming Languages: Java

Operating Systems : Windows 7,8, Linux

Tool s : Net beans 8.2

CCNA: Routers-Initial configuration, IP addressing and Sub netting, WAN interface configuration, Static routing, RIP, EIGRP, OSPF, Access list, VLAN, Inter-VLAN, Wireless LAN.

JAVA: Undergone “Java training” in TCS-ION Training Institute, Adayar,Chennai

B.E -in Electronics and Communication Engineering from SACS M.A.V.M.M College of Engineering-Madurai affiliated to Anna University, during 2012-2015 with Secured CGPA-5.85.

Diploma in Electronics and Communication Engineering from Ramu-Seetha Polytechnic College-Kariapatti, Viruthunagar affiliated to Board of dote Education during 2009-2012 with an aggregate of 76%

Secondary School Leaving Certificate from Nehru Vidhya Salai Higher Secondary School, Madurai during 2008-2009 with an aggregate of 81.6%

Networking,

Software Development

Company Name: TNQ Books and Journals Pvt Ltd, SRP Tools, Chennai-(Duration: 1 Year)

Department : Quality Control-Designated as Associate Quality Control- (Elsevier S&T)

Job Description: Proof read the articles word by word, Style check the all the type of articles according to customer requirements. Coordinate with copy editors and Paginator in case of any clarification and help technical editors compile an issue.

Completed the one week In plant Training in southern Railway-Madurai.

Completed the 1 Week In plant Training (Control Room, Studio Recording and Transmission chains, Studio Transmitter Link, AM and FM Transmitters.) at All India Radio-Madurai.

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TITLE: Low power DCT computation using with the fixed angle rotation (CORDIC)

Co-Ordinate Rotation Digital Computer (CORDIC) is algorithm based on the reconfigurable discrete cosine transform (DCT) architecture. The all computations in DCT are not equally important in generating the frequency domain outputs. Considering the importance difference in the DCT coefficients the number of CORDIC iterations can be dynamically changed to tradeoff image quality for power consumption. Thus, the computational energy can be significantly reduced without seriously compromising the image quality. The error correcting technique has been coded in verilog HDL and simulating using Xilinx 12.1.

I hereby assure you that the information furnished above are true to the best of my knowledge.

Place:

Date: (S.GANESHBABU)

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