Software Engineer Developer

Chung Shien Chai

*-**-** ***** *, Greenlane Heights, 11600 Penang, Malaysia • +601*-******* •

**************@*****.***

Objective

To contribute with strong background in software development and hardware debugging, along with unique drive for excellence and success, in design software engineer position. Professional profile

Solution-driven professional in software development, hardware debug and testing

Resourceful, creative problem-solver with proven aptitude to analyze and implement complex designs requirements

Ability to bridge technological gaps between different teams operating in completely opposite departments

Enthusiastic learner who quickly grasps new concepts and technical skills. Technical Skills

Software

C/C++/assembly

Python scripting

Microsoft Visual Studio

QT GUI programming

SVF (Serial Vector Format) programming

JAM STAPL (Standard Test And

Programming Language)

Hardware

Verilog/VHDL

IEEE 1149.1 JTAG (Joint Test Action Group)

protocol

Hardware development and debugging

ARM DAP (Debug Access Port) knowledge

Professional activity

Senior MTS Software Engineer, Intel Programmable Solutions Group (PSG) Penang Malaysia, Jun. 2007 – Present

Job Scopes

Developer of Intel Quartus Programmer GUI/CMD tool

Application used to configure and program Intel FPGA devices, CPLDs, configuration devices and flash devices

Developer of Intel Quartus JTAG Chain Debugger GUI/CMD tool

Application used to debug JTAG chain

Application used to execute JTAG command in the chain

Developer of Intel Quartus Convert Programming Files GUI/CMD tool

Application used to generate various types of programing file

Responsible in generating Intel FPGA devices bitstream for 28nm, 20nm, 50nm and 14nm FPGA families

Developer of Intel Quartus Fault Injection tool

Application used to simulate, debug and correct/scrub Single Event Upset of FPGA devices

Developer of Intel SoC Hard Processor System flash programming tool

Application used to program NAND and Serial NOR flash devices through ARM DAP

Developer of Intel Quartus configuration IP

Configuration IP used to access Parallel NOR and Serial NOR flash devices

Configuration IP used to configure FPGA

Developer of Intel Quartus Configuration database

Data-driven database for Intel FPGA devices, CPLDs, configuration devices and flash devices information and settings

Developer of Intel 14nm FPGA devices configuration test firmware

Firmware used to validate FPGA configuration prior to production

Developer of Intel FPGA Manager

A prototype that allows Windows application client to interface with application server through Winsock TCP/IP, which then interface with FPGA through PCIe

Lead and work on Intel FPGA/CPLD devices bring up

Responsible in validate and support configuration checkout when new silicon is back

Lead and work on hardware development and debugging

Hands on experience with FPGA debug methologies and lab debug equipment such as SignalTap, oscilloscopes, logic analyzer

Exercise good coding methodology

Create unit test on codes developed

Create regression test for owned features

Code reviewer

Plan and mentor for junior engineers

Education

B.Sc. in Electrical & Electronics Engineering (1st Class Honors), University Technology Malaysia, 2007.

Diploma in Communication Engineering (1st Class Honors), University Technology Malaysia, 2004 Awards

Ericsson Kacip @ Cut-Edge Award (Bronze)

UTM 33rd Convocation Dean’s Award

Patents

Approved US8427347B1 – Dynamic data compression and decompression

Few pending approval patents

Contact this candidate