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VLSI in wireless communication

Location:
Salem, TN, 636001, India
Salary:
3LPA
Posted:
July 20, 2017

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Resume:

CURRICULUM VITAE

A JOTHI BASKAR MOBILE: 979*******, 720*******

Email:*************@*****.***

**/***-********** **** ******,

Chennampet,

Vaniyambadi-635751

Vellore Dist.

Tamilnadu

Objective

Sincere and committed person, able to work in a team, and Adaptable. Good problem-solving skills, self-learning, self-motivation and hardworking make me an ideal choice to the industry for the growth of both organization and me.

Profile Summary

Worked in Feature software solutions(JAN -2017)

Having one year experience in embedded systems (Wizaard systems (2015-2016Sep)-Coimbatore).

Completed M.E – VLSI Design by June 2015 with significant exposure in VLSI Systems.

Completed B.E.–E.C.E.in 2013.

Good communication, analytical skills and ability to learn things in short spam.

Professional Experience:

Image processing in Mat lab.

Programmer (Embedded).

Programming for ARM7 in keil c compiler.

Hardware testing-ZIGBEE(ARM7)

PCB design basics single and double layer.

Academic Performance

Course

Institution

Batch

%Mark or CGPA

M.E. VLSI Design

Vel TechMultiTech

Chennai.

2013-2015

8.16 (CGPA)

B.E. E.C.E

PEC, Vaniyambadi.

2009-2013

7.0 (CGPA)

HSLC

HHSS, Vaniyambadi.

2008-2009

81%

SSLC

HHSS Vaniyambadi.

2006-2007

80.5%

Technical Skills & Experience

VLSI Systems

Basic knowledge of CMOS, ASIC&FPGA Design Flow, Analog Design flow.

ASIC - Physical Design Net list to GDS II flow.

SOC Design, RF and Memory circuits in cadence virtuoso v6.14.

Experience in CADENCE Virtuoso, Spectre, ADE L, ADE XL for Analog Design.

Experience in CADENCE Encounter flow for Digital Design.

Embedded Systems

Good Knowledge in REAL time systems and operating systems.

Basic in Electronic design and circuit concepts.

Micro controllers and micro controllers in Proteus 8.0 professional

PCB design in Orcad 10.5.

Programming Language

Verilog coding for Digital circuits in Xilinx ISE 7.1 and Model sim 6.

SPICE coding for CMOS analog circuits in Hspice tool.

C&C++ language

Skill Set

Operating systems: Windows XP,7&8, LINUX REDHAT 6.

Software Tools: Microsoft Office, Cadence, Xilinx, Tanner EDA, Keil, MATLAB.

Design Tools: Auto CAD 2010.

Additional: Photoshop, Corel draw.

Areas of Interest

VLSI systems.

Embedded systems.

PCB Design

PROJECT HANDLED (Embedded systems)

ARM 7 USING LPC2148 FOR ZIGBEE TRANS COMMUNICATION.

The LPC2141/2/4/6/8 microcontrollers are based on a 32/16 bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, that combines the microcontroller with embedded high speed flash memory ranging from 32 kB to 512 kB. Due to their tiny size and low power consumption, LPC2141/2/4/6/8 are ideal for applications where miniaturization is a key requirement, such as access control and point-of-sale. A blend of serial communications interfaces ranging from a USB 2.0 Full Speed device, multiple UARTs, SPI, SSP to I2Cs, and on-chip SRAM of 8 kB up to 40 kB, make these devices very well suited for communication gateways and protocol converters, soft modems, voice recognition and low end imaging, providing both large buffer size and high processing power.

TEAM SIZE: 3

Project work in M.E. (VLSI)

I.A LOW PHASE NOISE CMOS QUADRATURE VOLTAGE CONTROL OSCILLATOR USING CLOCK GATED TECHNIQUE IN 180nm TECHNOLOGY.

This project presents the low phase noise CMOS quadrature voltage control oscillator using clock gating technique. Here the colpitts vco is used to split the capacitance in the Qvco circuit producing quadrature output. The startup condition in the oscillator is improved by using enhancement. This QVCO performs the operation antiphase injection locking for device reuse. The new clock gating technique is used to reduce the power with the power supply 1.5v. The QVCO uses a 0.5m with phase error of and exhibits a phase noise of -118dBc/HZ at 1MHZ offset at the centre frequency of 500MHZ

PUBLICATION:

Jothi baskar A Int. Journal of Engineering Research and Applications www.ijera.com ISSN: 2248-9622, Vol. 5, Issue 6, (Part -1) June 2015, pp.51-53

NATIONAL CONFERENCE IN ADHIYAMAN ENGINEERING COLLEGE.

II.Design of ALU using Verilog and layout in Encounter.

Project work in B.E. (Embedded systems)

I.TRAIN COLLISION AVOIDANCE USING ZIGBEE COMMUNICATION in PIC Microcontroller.

In this project, it consists of two sections, one is Train-A section and another one is Train-B section. Each section having five switches in order to send the track number manually. Suppose if the engine driver press the switch-1 in the train-A means it indicates that the train-A was now traveling in the track-1, then this information is send over Zigbee communication. At the same time train-B receives this information and it check whether the train-B is also traveling in same track number or not. Suppose if both train are in the same track means, automatically it starts to give a buzzer alert to both the engine driver otherwise it ignores that message. So, by using this technology we can avoid the train collision.

TEAM SIZE: 3

PLACE: HCL INFOSYSTEMS LTD.

II.ELECTRONIC SIREN USING OP-AMP IC741.

There are several circuits in the IC741 seen in every electronic section. Here we are using IC741 as the major role in this mini project. The IC741 is the type of differential amplifier having high gain Dc-coupled amplifiers with two inputs and one output. By using IC741 we do the mini project “ELECTRONIC SIREN”. We see the electronic siren in the place of ambulance, police cars and fire engine. In this electronic siren circuit, we use two square wave generators. It produces the output of square wave.

Trainings/Workshops/Conferences & Symposiums Attended

Workshop on “Digital IC Design -USING Cadence EDA” in Veltech Multi tech college on April 04, 2014.

Two-day NATIONAL CONFERENCE ON “EMERGING TRENDS AND DEVELOPMENTS IN INFORMATION, COMMUNICATION, VLSI DESIGN AND EMBEDDED SYSTEMS” in Adhiyamaan college of Engineering held on 19th and 20th March 2014.

3day course on ‘Global System for Mobile (GSM) Technology’ conducted in Vellore institute of technology, from8th to 10th March 2012.

National Level Technical Symposium in Podhigai College of engineering and technology. Presented paper on “4G Technology” on 3rd March 2012.

National Level Technical Symposium in Meenakshi College of engineering “Code Busters, Bicircuitrix, Node gaming, Quiz wiz” held on 29th February 2012.

One day National level workshop on “Recent Trends in Information (WEB) Technology” held on 25th February 2012.

Training on “1G 2G 3G” in Thanthai Periyar Government Institute of Technology on 23rd Feb 2012 in Vellore.

Extracurricular activities

Participated in Cultural and Fine Arts “COMEDY SHOW” in PEC held on20/04/2013.

Completed “HINDI PRATHMIC EXAMINATION”.

Was nominated as a department representative for Displaying Good Management Qualities during my Graduation and Post-Graduation.

Hobbies

Reading books and magazines.

Watching movies and news for my entertainment.

Personal Profile

Father's Name : R ANANDAN

Date of Birth : 23-08-1991

Sex : Male

Marital Status : Single

Languages known : Tamil, English, and Hindi.

Declaration

The information provided above is true to the best of my knowledge and belief.

Place: CHENNAI

Yours Truly,

Date: A JOTHI BASKAR



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