Computer Hardware Engineer, digital/physical circuit design

James Demma *******@*****.***

Current Address: **** ******* ***, ******, ** 80005 571-***-****

LinkedIn profile: https://www.linkedin.com/in/james-demma-30831b83 EXPERIENCE Engineer Ultrata, LLC

Boulder, CO September 2016 – Present

• Digital logic design targeting Xilinx Ultrascale Kintex/Virtex

• High speed I/O IP integration (DDR4, ONFI4, PCIe Gen3)

• High speed PCB signal integrity and cross talk analysis ASIC Designer Micron Technology

Boise, ID June 2014 – August 2016

• Performed physical implementation of block-level designs, RTL to GDS, 28nm.

• Floorplanning, P&R, STA, noise analysis, formal equivalence, DRC, LVS

• Contributed to development of custom tool flow (tcl, perl, python)

• Blocks included PCIe and ONFI interfaces for SOC

• Designed and implemented digital delay locked loop, library of digital ring oscillators

• Developed highly configurable scripting system for SRAM model generation Research Assistant Hume Center for National Security and Technology Blacksburg, VA August 2012 – May 2014

• Embedded system programming and design, targeting a Tilera TilePro64

• Software radio development on GNU Radio, focusing on hardware/software interface, high speed data paths, and low level optimization

• Digital logic design targeting a Xilinx Virtex 6, implementing a bus-mastering DMA PCIe endpoint, Linux driver design and custom interface software EDUCATION M.S., Computer Engineering, May 2014 In-Major GPA 3.94/4.00 Virginia Polytechnic and State University Overall GPA 3.90/4.00

• Thesis research focused on implementing a software framework (python) to generate hardware factor graph solver designs (verilog), targeting a Virtex 6

• Coursework focused on HW/IC design, test/verification, semiconductors and devices B.S., Computer Engineering, with Honors, May 2012 In-Major GPA 4.0/4.00 Minor in Mathematics Overall GPA 3.94/4.00

Virginia Polytechnic and State University

• University Rank 135/5836 • College Rank 26/1268 • Major Rank 3/61 SKILLS Software

Cadence Tools: Innovus (EDI), Tempus, RTL Compiler, Virtuoso, Conformal, Allegro

Synopsys Tools: HSpice, Design Compiler

Mentor Tools: Calibre, Questa (ModelSim), Verdi, Hyperlynx FPGA and Other: Xilinx Vivado, Altera Quartus, Matlab Languages

TCL, Python, Perl, C++, Java, Verilog

AWARDS • Published in 2014 International Conference on ReConfigurable Computing

• Awarded full tuition and funding via Grad Research Assistantship at VA Tech

• Awarded Electrical and Computer Engineering Fellowship at VA Tech

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