Frank D. Wright

**** **** **.

Charlotte, NC ****6

570-***-**** Cell

ac1a1w@r.postjobfree.com

QUALIFICATIONS

Over 30 years of professional experience in hardware engineering covering a multitude of technologies and disciplines. Extensive background in military, telecommunications, and general commercial and industrial markets.

SKILLS

• Mentor Graphics Board Architect Schematic Capture.

• Mentor Graphics IS Interconnect Synthesis Hyperlinx for signal integrity verification.

• Orcad Schematic Capture. AutoCad

• Orcad Spectra Quest signal integrity verification. Orcad PC Board Layout.

• Altium Designer PC Board Schematic & Layout.

• PWB Design technologies

• Cadence Schematic Capture

• Reliability, DFM, & DFT (DFX)

• PSPICE, C

• Assembly language for numerous 8, 16, & 32 bit microprocessors.

• AVR, 8051, 68HC11, PIC.

• Altera Quartus & Max+Plus.

• DDR2, RLDRAM, SDRAM, & SRAM

• Xilinx Foundation & Alliance.

• Agile, DeBug. Troubleshooting.

• RS485, RS232, RS-422, Ethernet, I2C, SPI.

• Windows Office Family, Visio.

. EMI and EMC, RFI, ESD testing, PLC’’s and controls

• Telcordia ® GR-253-CORE

• Mil Specs & Standards. ANSI, NFPA, and NEC

PROFESSIONAL EXPERIENCE

Ball Systems inc Direct Westfield,IN Nov 2016 – Jun 2017

Test Engineer

Worked with other members of the team to develop test boards and test systems for a range of Manufacturers from Automotive to Aerospace. Worked last on a wireless 5Ghz link for an aircraft PCM test system.

Rand McNally Inc under contract of Patriot Recruiting Skoie, IL September 2016 -November 2016

Senior Design Engineer

Worked in cooperation with ODM and local engineers to develop a Fleet management tool that had GPS, a Cellular Modem an inertial nav. IC and a processor to collect data (both engine an operations) and automatically generate a drivers log and report back to fleet management.

Chemring Detection Systems. Under contract of Global Insight. Charlotte, NC (September2015 – August 2016

Lead Electronic Engineer

Heading up the electrical design of an Identification system for Biological and chemical detection system.

Using a PIC32 processor to control a sequencer for a Lab in a cartridge. Involves PID heater controllers, Stepper motor controllers, DC motor controllers, Serial communications, ultrasonic driver and controller, Power design and control and a Near Field Communications controller for Identification of the Cartridge. Wiring harnesses connectors and PCB Board layout and design. Entire design is designed with power efficiency in mind as unit must operate on battery power for 4 complete Identification Cycles (approximately 4 Hours)

Presented to customer at PDR

Microsoft Inc. Under contract to Posh Consulting. Redmond, WA (January2014- June 2014)

Electronic Engineer

Responsible for reviewing and updating the power and battery system for the “Surface” product line. I have performed numerous component reviews to minimize power losses in the power switching circuits. Changed components (FETs) with newer lower RDS on values. Optimized random glue logic with small programmable ICs (Silego). Working on test equipment to measure and monitor power for evaluation. Debugging new revs of boards as they come available for power losses and power efficiency.

Delta Subsea Montgomery, TX (May 2013 – September 2013)

Electrical Technical Manager

Responsible for setting up new facility for System Integration Testing of the complete Remotely Operated Vehicle System. The system consisted of an ROV (Remotely Operated Vehicle) a TMS (Tether Management System) and a LARS (Launch And Recovery System) along with two 10’ X 40’ Modules, one a Control Van and the other a Work Van. Provided the direction for the installation of required power for the facility (2ea 600Amp 480 VAC 3 phase disconnect boxes). Provided support for the LARS Motor Controller PLC, Provided requirements for the workshop build out and ordered tools, test equipment, benches, and supplies for maintenance. Provided lists of required additional spare electrical parts for deployment. Prepared procedures for the System Integration Test to insure proper configurations and testing. Provided information to the training manager to assist in training the ROV Pilot Techs. Provided assistance to the Tooling Manager with electrical interfaces and assisted anyone with questions or problems of an electrical nature.

Schilling Robotics Davis, CA (January 2009 – March2013)

Sr. Electronic Engineer

Lead hardware engineer for electronics control group for Remotely Operated Vehicles (ROV). All ROVs must be designed to withstand 6000 Meters of Seawater (SW) ~ 12,000 PSI all electronics are operated in a hydraulic fluid pressure compensated to 15 PSI above the outside pressure to prevent sea water intrusion. Responsible for all EMI, EMC and ESD testing. Currently working on several projects, LCU Light Control Unit which provides a variable power to 12 250W underwater lamps, HPU motor controller (Allen Bradley PLC) interface, HPU (Hydraulic Power Unit) controller which provides hydraulic valve control for the seven thrusters of the ROV, and a power filter for the VIM (Video Interface Module). I Ws in charge of another project the redesign of the NODE board a board that has 16 channels of 10/100 Ethernet that connect to multiple interface modules. My last Project was a 390VDC 3200 Watt power supply that operates at a depth of 1,000 ft. with a 25 year life and a 97% reliability over 10 years.

Dell Inc. Round Rock, TX (August 2006 – October 2008)

Desk top Hardware Engineer senior consultant OPTIPLEX product line.

Performed multiple functions from project engineering to hardware development which included power supply development (AC/DC and DC/DC converters, Processor/Chipset determination (Intel, AMD, NVIDIA, VIA) and design. Interface design for Graphics interface and 10/100/1000 LAN on Motherboard (LOM). Developed test procedures for new product under development and tracked issues through product and system test. Worked with mechanical design team and Industrial Design group to develop mockups and proto systems to present to marketing for approval. Worked and interfaced with various manufactures of components and subsystems being utilized in the new design. Worked with PCB design technologies. Performed DFM, DFT, & Reliability reviews. Worked with a small development team and interfaced with an ODM (manufacture) in Taiwan as well as a Dell extended team. Helped other team members with EMI, EMC & ESD testing. Utilized MS Office Power Point for presentations of design concepts, tracking of progress, and status. My most recent position was as a Dell project lead for the Taiwan BIOS development team. I conducted weekly teleconferences with the Taiwan team as well as daily issue tracking with the Dell team. I was responsible for updating the schedule and insuring that milestones were met within the scheduled times.

Valley Technologies, Inc. Tamaqua, PA (November 2004 –August 2006)

Lead Hardware Engineer working with a group of Hardware Engineers developing high speed reconfigurable computing platforms. Boards designed included, RIO, SRIO, DSP and FPOA (Field Programmable Object Arrays) prototype boards for proof of concept for space flight status. Involved with design, test, PWB design technologies, and production of final assemblies. Developed schedules, Specifications, and Statements of Work for end customer. Performed DFX reviews. Last worked as lead engineer on an OC192 DWDM Tunable Mux/Demux system for a government agency. This was a high speed (10Gb/s) fiber optic telecommunications system. Responsible for the design and implementation of the system including all safety, EMC/EMI, and FCC approvals

Smiths Aerospace (December 2003 – November 2004)

under contract from Technisource

Hardware Test Engineer

Working on Common Automatic Test System, updating drawings and specifications. Also developing MIGS (Mishap Investigation Ground Station).For playback of Flight and Data Recorder for F-16. Developed test fixtures and hardware for J-UCAS Flight Management Computer. Worked with mil-specs and standards.

Eupec RMS (December 2002 - November 2003)

www.eupecrms.com

Lead Hardware Engineer

Responsible for the redesign and repackaging of an existing system. Utilized PWB design technologies. Created a 3U Compact PCI system with 8 analog inputs, 2 analog outputs, 8 digital inputs and 2 digital outputs. Supervised 3 engineers.The system provided for RS-232, PSTN modem, GSM modem and RF modem for communications to the main server. The system was powered by 110 VAC/230VAC 50/60 Hz. and via solar panels in areas where power was not accessible. Was responsible for testing for UL/CSA/CE and FCC approvals (EMI, EMC, ESD, etc.). Worked with customers to develop custom implementations suitable for their applications and interface to their SCADA system.

Calix Networks Inc. (August 2000 - October 2002)

www.calix.com

Lead Hardware Engineer, High Speed Design Group

Responsible for leading a team of seven engineers. Projects included a 12 channel DS3 Line Card, 12 Channel DS3 Transmux Card, a 14 Channel DS1 VT Card, a Virtual Tributary Processing Unit VT1.5/2 cross-connect card with 1344-port matrix, a quad OC-3 line card, a quad OC-12 line card, an OC-48 line card. Created Engineering Requirements Documents and did preliminary designs. Performed reviews at all stages of development from preliminary design reviews through release to production. Took the DS1-14 and finished the design through first prototype. First prototype was brought up and running with system software within 2 days after receiving from proto house. Utilized both OrCad Capture & Mentor Board Architect for schematic capture and IS Interconnect Synthesis for signal integrity verification along with Spectra Quest for complete coverage of signal integrity testing. Successfully produced boards utilizing PWB design technologies with high-speed (up to 2.5Ghz.) interfaces utilizing multi-layer (22 layer) PC boards with buried capacitance and buried resistance all high density SMT with 4 X 4 mil rules. Responsible for compliance of boards with all applicable regulatory agencies Telecordia, FCC(EMI, EMC, ESD, RFI), ITU, NEBS, etc.). Responsible for Reliability, DFM and testability, utilized JTAG testing for all major components.

NxGen Technologies Ltd. / ACI (January 1998 - August 2000)

www.aci.hq.com

Senior Design Engineer: Designed numerous small devices to be used in a perimeter security system. These devices provided for an Optical switch on the optical ethernet interfaces used within a facility. When an intrusion was detected alarms were activated and all ethernet access was interrupted. This was tied in with Video monitors that displayed the intrusion area and provided for control from a central panel. Designed an 8 slot CPCI 6U back-plane for an OC12 inline system. Designed full bi-directional OC12 front-end interface and PM (performance monitoring) transceiver board on a CPCI 6U board. Designed the processor board utilizing the Toshiba TMPR3927 MIPS processor. Designed the memory and the memory controller FPGA (Altera 10K100) configured as four DUAL PORT buffers. Performed PWB design with 14 layer PC Board layout for the above designs utilizing ORCAD LAYOUT board layout software. Successfully delivered two working systems to the NSA. Held a SECRET CLEARANCE.

Coherent Communications Inc. (1997 - 1998) (Purchased by Tellabs)

Lead Hardware Engineer Designed channel modules (OC-3) and interface to termination electronics, as well as the termination electronics. Designed high-speed PECL back-plane and its interface with PWB design technologies.

Aerotek under contract to COMSAT Labs (1997)

Hardware Engineer: Developed an Altera FPGA based 100 base T DMA controller for their system.

GRCI Telecommunications Division (1994 - 1997)

Electronic Engineer:

Designed SONET OC-3 Transceiver boards using PWB design technologies. Performed product selection and evaluation to conform to GR-253 Physical Layer requirements. Designed transceiver boards to cover VSR very short reach (ATM), IR intermediate reach, and LR long reach and STS3 electrical CMI interface. Tested for conformance to Jitter specs, Eye patterns, and pull-in and center frequency specs. Provided for all independent lab testing(EMI, EMC, ESD, NEBS and Telecordia). Prepared units for testing helped write test procedures and monitored all testing at site.

Grumman Melbourne Systems (1986 - 1994)

Senior Instrumentation Engineer

Participated in the design of an airborne bus formatter unit that inputs and formats numerous aircraft buses including Ethernet and MIL-STD-1553. Each of the buses is time-tagged, packed, and output to an AMPEX incremental digital recorder (DCRSi) for post flight analysis also took through mil-spec testing (EMI, EMC, Temp and Vibration). Participated in a design of a data stimulator, a unit that injects previously recorded flight data or computer-generated data, in real time. I was co-recipient of US patent # 5,257,144 for this design. Participated in the design of an encryption system interface for the high speed (300Mbs) RF Data link from the aircraft to the ground control and data processing center. Held a SECRET CLEARANCE with COMSEC. Worked with mil-specs and standards.

ITT Federal Electric Corporation (1984 - 1986)

Senior Member of TDVS Project Team

designed a multiprocessor (68020) real-time VME based system. Designed an all digitally generated 3 PCM channels at up to 12 Megabits/sec, four Pulse Amplitude Modulated (PAM) channels and 30 FM channels at up to 750 KHz. Held a SECRET CLEARANCE. Worked with mil-specs and standards.

Farmtronix Division of Ralston Purina Corporation (1981 - 1984)

Lead Electronic Engineer

Designed two new systems for computerized feeding of Dairy Cows. Supervised five engineers and three engineering technicians. Worked with Intel 8051, 8085, 8048.

Concorde Manufacturing (1979 - 1981)

Sr. Design Engineer

Designed automated test equipment for the test of CMOS logic boards for electronic slot machines. Designed power supply for slot machine and timer board for overrun protection. Performed PC board layout for multi-layered boards. Worked with Intel 8085 and Zilog Z-80.

Roman Industries (1974 - 1979)

Sr. Design Engineer

Performed hardware and software design.

Designed and put into production several electronic dice games and two pinball machines. Performed PC board layouts, purchasing, and set up production. Designed the first microprocessor gaming device to be approved by the State Gaming Control Board. Worked with Intel 4040 and Fairchild F-8.

Casino Equipment International (1971 - 1974)

Sr. Electronic Engineer

Designed and put into production the first totally electronic slot machine. Worked in all phases from design and testing through approvals and production. Used TTL and CMOS logic.

EDUCATION

United States Air Force (1966 - 1970)

Electronic Warfare Technician- (AFSC 30153) Performed repair and maintenance on

airborne Radar and Communications Jammers.

Capital Radio Engineering Institute, (1968 - 1974)

Electrical Engineering courses.

PATENTS

US patent # 5257144

"Synchronization and automatic resynchronization of multiple incremental

recorders".

Contact this candidate