Design Engineer Power
Resume:
Address: **** * ******* *** **** of Birth: 20 SEP 1965
Campbell, CA Telephone: 1-408-***-****
***** *****: ac17g1@r.postjobfree.com
PROFILE
A motivated Analog circuit design engineer with 12 years in switching regulators. Strong understanding of design and issues, having worked in busy analog circuit design environments. Seeking an analog design role with scope for technical challenge, career progression, and especially in switching regulators. Main work includes buck, boost, buck-boost dc-dc conveter, and Isolated flyback dc-dc converter including an isolator, PD(power device), active Bridge.
Power circuit design experience: 15 years
Simulation tool: Cadence, Mentor, Hspice.
EXPERIENCE
2011 Mar ~ 2017 July: Kinetic Technology (Akros-Silicon Inc), San Jose CA
As a design engineer, I’ve designed mainly PDs and Isolator. And also experienced active bridge and Flyback converters.
A. PD(Power Device) revision work : on production
- Mainly signature failure fixed
- and hotplug failure fixed.
- working with flyback controllers.
B. designed an Isolator
- including Manchester decoder and encoder.
- signal passing through 2000V isolation barrier.
- PWM comparator output on secondary side is encoded in Manchester and transferred to primary side through an Isolator.
C. experienced revision of an active bridge and a flyback converter on different process.
- Replaced the diode bridge with an active bridge
- Constant on time architecture current mode flyback converter
- Average current limit on secondary and peak current mode on primary side
2008 Jan ~ 2010 Jun: Maxim Integrated products Inc. NC
As a staff design engineer, I’ve designed and experienced Boost controllers in a PMIC, and analog macro cells inside a class D audio amplifier.
A. Boost controller
- Peak current mode
- Output Voltage changes on the fly.
- Vin=5.5~29V
- Vout=14V~50V
- Pout=15W
- Fswitching=400kHz
B. Analog blocks in the full bridge class D audio amp.
- Bandgap reference, Thermal warning/shut down, voltage bias, current bias
- Op amps(, and comparators) in the modulator, current limit
2002 ~2007 Consultant work which designated to HQ of Jepico America (NJ)
As a project leader, I’ve designed buck-boosts converters, and experienced a charge pump, analog macro cells.
A.Buck-Boost: on production as an IP inside custom IC.
-Single voltage-mode operation
-Output change on the fly (controlled by external DAC )
-External type3 compensation
-Architecture features one switching per one period all over Buck, Boost, Buck-boost modes (based on my patent)
-Vin=1.8~5.5V
-Vout=typical 3.3V
-Fswitching=1MHz
-Peak Efficiency=95% at buck-boost mode
-Synchronous
B.10bit SAR ADC: Employed Offset zeroing technique
C.Charge pump: Voltage Doubler (Push-pull, input current control)
D.Sound amplifier: (Driving 8-ohm speaker, 16-ohm headphone)
2000 - 2001 ATMOS Corp. Ontario, Canada
As a circuit designer, I did checking and reporting patents for word-line drivers inside memory circuit. We got laid off due to financial shortage in the company.
1999 - 2000 Pointchips Seoul / Korea: As a circuit designer, I designed analog blocks.
1991 - 1999 Samsung Electronics Kyungki-do/Korea
As a beginner and junior employee, I did several analog and digital work.
Analog work:
-Designed ADC: 10bit 500kHz Recycling and on Production as an IP inside custom IC
-Designed Analog Cell libraries (amplifier, comparator, DAC…) and on Production as an IP inside custom IC.
Digital work: performed DFT(Design For Test)
-Boundary SCAN Insertion (around analog block and memory block)
EDUCATION 2/1991 Hanyang University in Seoul city, South Korea.
Bachelor's Degree
Electronics and communication
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