Dr. Anu Asokan

* ******** **, #*, *****, NH 030**-***-*** 7461 ac0u6d@r.postjobfree.com https://www.linkedin.com/in/anuasokan123

Expertise in Research and Engineering, with a long-term desire to find solutions to human problems.

Education

Ph.D. in Automatic Systems and Microelectronics

11/2012 - 12/2015

oUniversity of Montpellier, France

oResearch focus on Signal Integrity-Aware Pattern Generation for Delay Testing

oFully funded ENIAC ELESIS European project ($80,000), EURODOTS scholarship

M.Sc. in Microelectronics

09/2011 - 08/2012

oNewcastle University, United Kingdom with Summa cum laude (Distinction)

oInternational Postgraduate Scholarship (awarded to the top 10% of the class)

B.Tech. in Electronics and Communication Engineering

09/2003 - 07/2007

oMahatma Gandhi University, India with Magna cum laude (First Class)

Core expertise

IC design, Digital and analog circuit design

Design for Test (DFT), ATPG

Statistical modelling, optimization techniques

Low-power designs

Re-engineering

Project management

Technical skills

Cadence: RTL Compiler, SOC Encounter Place & Route, Virtuoso, Spectre, OrCAD

Synopsys: DC Compiler, PrimeTime STA, TetraMAX, HSPICE

Mentor Graphics: Modelsim, Hyperlynx Signal Integrity and PCB Thermal, PADS

National Instruments: LabView

Languages: VHDL, Verilog, PERL and C

Others: Matlab, OriginPro

Professional

Experience

Ph.D. Researcher, CNRS, LIRMM, France

11/2012- 12/2015

oAnalyzed and modeled different combinations of delay defects (original work). Reduced functional yield-loss by ~6%.

oDeveloped a novel automated tool capable of identifying high quality test patterns. Increased test coverage by ~10%, captured ~40% of delay faults and reduced computational time by ~35%.

oPresented research findings at 5 international conferences. Resulted in grant writing of 2 new project proposals, 8 first-author publications and a Ph.D. thesis.

oLed a 3-member interdisciplinary team for the implementation of my research findings on industrial circuits (STMicroelectronics).

oMentored 2 master’s student projects.

Design Engineer, Larsen and Toubro Ltd, India

05/2010 – 09/2011

oRedesigned printer boards, fixed signal integrity issues, analyzed power and thermal operation, worked on full product development life cycle within CMMI Level 5 standards.

oDeveloped proficiency in tools (Hyperlynx Signal Integrity, Altium Designer, PCB Thermal) and imparted this knowledge to ~200 newly joined graduates.

oIntegrated firmware and hardware by working closely with 5 different execution teams.

oProposed novel techniques for improving power efficiency. Received appreciation from the clients.

Application Development Engineer, Promptec, India

08/2007 – 05/2010

oDesigned and developed low-cost DC and AC LED drivers (achieved efficiency >95%, >85% respectively). Resulted in ~60% profit increase per driver board.

oDesigned and developed customized automated test equipment for testing LED driver boards. Increased testing rate from 6 to 30 boards per hour, resulted in increased product shipments.

oParticipated in negotiating 9 contracts with key vendors. Grew sales by $150K in 2009.

oDebugged and resolved driver board issues. Rated as the best employee in re-engineering division, Promptec in 2009.

Publications

An ATPG Flow to Generate Crosstalk-Aware Path Delay Pattern, ISVLSI 2015.

Path Delay Test in the Presence of Multi-Aggressor Crosstalk, Power Supply Noise and Ground Bounce, DDECS 2014.

A Delay Probability Metric for Input Pattern Ranking Under Process Variation and Supply Noise, ISVLSI 2014.

Full publication list at https://www.linkedin.com/in/anuasokan123 (+3 in submission process; omitted)

Activities

Internal reviewer for many IEEE conference papers and journals.

Student organizer for ISVLSI and SEMIDOCTUS-MIC (LIRMM) conference, 2015.

Welcome leader and campus tour guide for newly joined Ph.D. candidates.

Europe trip planner and guide.

Technical interviewer of incoming graduate students, 2010.

Student representative for Career guidance and placement cell and Anti-ragging (hazing) committee, 2003-2007.

Recipient of Rashtrapathi (Presidential) Award for Girl Scouts in India, 2000.

Interests

Writing, Dancing (Indian classical), Skiing, Travelling, Fitness, Science, Management, Women’s education, Volunteering

Languages

English, Hindi (mother tongue), French (basic)

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