Power Electrical Engineering

Ajay Bhaskar

ac0t0k@r.postjobfree.com 607-***-**** *788 Tennis Club Drive, West Palm Beach, Florida-33417

Authorized to work in the US for any employer and willing to relocate

Education

Binghamton University, Binghamton, NY

M.S., Electrical Engineering (May 2016)

Anna University, India

B. E., Electrical and Electronics Engineering (June 2014)

Technical Skills

Hardware description languages : Verilog, System Verilog

Software Languages : C, C++, Java

Tools : Cadence, Design Vision, Xilinx,PSSE, Hpsice, Altium, Revit, Model Sim, AutoCAD, PSCAD, RSCAD, Powerworld, Simple Scalar, Android Studio, Autodesk Maya, MATLAB, R Simulator, Altera.

Projects

Load Flow analysis of Ward-Hale model using Powerworld.

The basic idea for the VAR dispatching method is demonstrated using the 6-bus system (Ward-Hale).

In order to accomplish this job, we had to know what effects the change in one part of the system may have on another part of the system and how to create the desired change using 3 way signal splitter and load balancing.

For example, if it is our intent to reduce the reactive power flow on a line we must develop an intuition as to what changes in the system would occur by adding a reactive power source.

Power system Reliability

Reliability indices are calculated using MATLAB programming for a 5 bus network consisting of 3 generators and 2 loads with single branch contingency and without contingency taking into account the NEC (National Electrical Code).

From the results managers can take appropriate decision to improve the load curtailment by buying power from neighbors, installing new generators or transmission lines which eventually improve the reliability of the system.

Design Project: Power system network for the given layout of buildings in PSS/E

The functions of different files such as save files, slider files etc were studied in detail.

Designed a simple power system with ten buses for implementing the operations.

The AC Contingency Calculation (ACCC) was performed and further run with multiple ACCC for comparison of different power systems.

Designed a one-level 16-bit carry by-pass adder using Manchester carry chain

Layout and Schematics were fed to the Hspice Simulator to check the functionality.

Implemented Ladder Logic (PLC) for the desired output and ensure the machines are running at maximum efficiency.

The 16-bit adder was also designed and tested using AutoCAD for more readability.

Work Experience

Graduate Assistant – Binghamton University – Binghamton, NY

Working alongside with Professor Yu Chen on CMOS/VLSI Design and ways to make electrical machines more efficient using Integrated Circuits.

Gaining more knowledge on how to implement industrial grade IC designs using AutoCAD and Altera.

SCHNEIDER ELECTRIC, Chennai, India – Project Intern

Worked on the improvement of capability of test benches which are used for testing miniature circuit breakers.

Improved the operating efficiency and decreased the cost of the test bench by a figure of 57% by means of designing a firing circuit which employs the aid of solid state electronic devices and power electronic circuitry.

SIEMENS Healthcare, Chennai, India – Intern

Observed the functioning of critical medical equipment in multiple work stations.

Analyzed the equipment and then improved the functional excellence.

Reapplied the existing working schematics of CT scan equipment with few performance upgrades.

Submitted the report on various learnings to my faculty at Anna University.

Course Work - Digital Signal Processing-I, Digital Signal Processing- II, Digital Systems Design-II, Power Electronics, Computer Design, Analog Design, Computer Networks and Architecture, Mathematical Methods in Computer Engineering and CMOS and VLSI Architecture, Power System Analysis, Power Distribution Systems(IS), Advanced topics in Power(IS).

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