Engineer Electrical Engineering

Rafe A. Husain

**** ***********, ******, ********** *****

951-***-**** • ******@*****.***

Electronic and Electrical Engineering Professional

Accomplished, dynamic senior electronic engineering professional with history of developing cutting-edge software, hardware and network solutions for world-renowned technology companies.

Areas of Expertise

Excellent oral and written communication skills

Proven ability to track program schedules and cost baselines

Personal ownership and accountability, the ability to find solutions in difficult situations

Ability to work collaboratively across the department and disciplines

Proven ability to work proactively with others, driving decisions while also functioning as a team

Experience developing program schedules and cost baselines

Familiarity with Hardware cost estimation process and methods,

Knowledge of Root Cause Corrective Analysis.

Very familiar with COTS and systems integration

Experience with Hardware Digital design, validation board bring-up, hardware/software integration testing.

Familiar with NTDS, ARINC-429, CAN, MIL-STD-155

Familiar with DO-254 documentation process for FPGA’s

Expert in FPGA design, simulation and testing.

Professional Experience

Thinkom 2016 to current

Consulting Engineer

Design of DSP FPGA based 3 axis aerospace certified motion controller engine For use in their future Airline FAA certified satellite dish antenna system. Moved software Automatic Frequency Control (AFC) algorithm to FPGA.

Broadcom 2011 to 2015

Principal Engineer

Execute all duties related to conducting cellphone baseband test and validation. Shepherded the design of a PMU emulator within field programmable gate arrays (FPGA) that tracked power usage. Led the design of C# test firmware adopted by Lab Technicians for testing. Instrumental in debugging post-release Android handset failures and lockups. Developed custom FPGA code including a slowly rolling signal that swept Android handset to replicate a glitch in under three minutes, a savings of numerous days of field work. Acted as project owner for multiple peripherals for test and functional validation including i2s and SPI blocks.

Key Achievements:

Instrumental in debugging handset issues that had been perplexing the entire team

Conceptualized and implemented complex automated reporting in C# that emailed test failures.

Pioneered the design of embedded Xilinx-based power monitor tool.

Utilized Xilinx DPLL blocks to create clock sweepers for various test and functional validation applications.

Rapidly remediated a bug causing Android handset crash that was holding up 5 million chips in production.

RDLABS 1997 to 2011

Senior Engineer

Completed numerous consulting projects for clients. Streamed raw data through USB time-sensitive endpoints to soft GPS process engine. Directed a team of Software and RF Design Engineers for test and validation. Constructed robust product validation plans and test procedures for board and chips. Developed RF test bed procedure and Wi-Fi compatibility laboratory. Used Xilinx FPGAs to create virtual support devices. Drove the creation of a single-cycle Golay encoder.

Key Achievements:

Filed several United States Patents.

Tested soft GPS receiver FPGA and board for RF Microdevices.

Designed and tested 12V DC motor controller with feedback for precision movement of digital electronic microscope slide rotation device for Trestle Corporation.

Conducted testing and troubleshooting of Wi-Fi wireless 802.11b module for Pacific Digital.

Performed testing and integration for an 802.11b and an 802.11b baseband and mac for Telematix Corporation.

Oversaw the architecture and design of post-silicon hardware verification test bench for Intel.

Instrumental in the design, simulation and test of receiver demodulator for CUBIC Corporation (DO-254)

Devised, developed and implemented an innovative simulation protocol.

Extensive experience with DO-254/ DOORS requirements capture and verification methodology.

Satellite Technology Management – Senior Engineer 12/95 to 12/97

Design and test of Multi rate Digital Modulator with FPGA/Asic including Viterbi encoder/scrambler digital sinx/x wave shaping and digital IF. Designed Auxiliary Interface card, Line control processor card, Ethernet based backplane and Digital Demodulator Asic test card (3 Xilinx FPGA’s).

10/92 to 12/95 SMC – Principal Engineer

Defined architecture and designed high speed bus mastering token ring network adapter Designed FPGAs (3 Xilinx 4013’s).

6/87 to 9/91 Sabtech Industries – Founder

Conceptualized, designed, reviewed, supervised and tested all software and hardware products. Managed entire technical staff, and co-ordination with external consultants. Additional duties entailed interfacing with PC board design bureaus and fabrication companies. Provided technical sales support and engineering presentations.

Designed high speed 68020 based VME NTDS interface adapter using video rams for NTDS I/O.

Designed Sabtech Eagle 16 bit high speed pipelined IBM PC-AT to NTDS interface adapter.

Designed and wrote DOS resident NTDS device driver with a language independent architecture.

Designed and wrote windowed NTDS diagnostics software package.

Designed AT1750A and ORBITER (Mil-Std-1750A) co- processor boards for the IBM-AT.

Designed and wrote Sym50 symbolic debugging software for embedded systems.

9/83 to 6/87 Hughes Aircraft – Lead Engineer

Designed special 32 bit (NTDS) board that allows an IBM PC to replace old Varian computer. This board along with software that I wrote replaced the entire Varian based system testing.

Involved in design and check-out of real time graphic display system (Digital Television Generator) for the Navy. DITEG had 6 cpu's, two bit slice i/o processors and 2 bit slice graphics controllers. The display portion had 48 1024x1024 planes going to 6 output channels with upto 6 planes per channel.

Designed and wrote device driver for a real time multi- tasking operating system (MTOS). Integrated and checked out said operating system in 8086 based system. Designed, wrote and integrated mini real time kernel and interrupt handler for graphics terminal controller.

Inventions

Removable eyeglass mounted ptosis crutch for Blepharospasm patients.

High speed parallel Golay Encoder (single cycle 400 mhz encoder inside Xilinx FPGA).

New Inventions Award from University of Michigan for unpowered device that senses ice thickness

Formed a new entrepreneurial company Sabtech Industries along with my partner. Developed new products and established new markets. Brought the company to $5 Million in sales in 4 years

Xilinx Partner. Member of Xilinx FPGA xperts program

Technical Skills

Tools: Oscilloscope, Logic Analyzer, Spectrum Analyzer, Simulink/Matlab, Chipscope, Orcad, Cadence, High-speed Digital Design. Arduino Development

Languages: C, C++, C#, Verilog, VHDL, Python scripting,

Testing Baseband Testing, Validation with low, System Verilog, Modelsim Simulation. Familiarity with OVM and UVM verification methodology. Experience with DO-254

Education MS Computer Engineering Wayne State

BS Electrical Engineering University of Michigan

BS Mathematics University of Michigan

254254/ DOORS requirements capture and verification methodology.

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