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Design Engineer Electrical Engineering

Location:
Mountain View, CA, 94040
Posted:
June 28, 2017

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Resume:

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Hayri SANLI

Mountain View, CA *****

650-***-****

ac01lm@r.postjobfree.com

PROFILE

Innovative and adaptable Senior Hardware Design Engineer with experience leading complex projects and technical teams to deliver high quality projects with great attention to budget and schedule adherence.

Extensive experience in PCB development; part selection, schematics, layout, fabrication and testing.

Developed scalable electro-mechanical test systems for production, characterization and quality control. EXPERIENCE

WireFree Networks; Mountain View, CA Feb 2016 - Present Hardware Engineer

Designed and developed Atmel microcontroller base proprietary wireless IoT home automation system using Altium Designer for schematics and layout.

Developed a code to communicate with wireless radio and sensors; and used machine learning algorithms to process the sensor data with using Atmel Studio.

Designed mechanical parts for 3D printers to test and enclose the system using FreeCAD. InvenSense Inc.; San Jose, CA Apr 2009 - Feb 2016 Lead Hardware Engineer

Managed a technical team of engineers and technicians. Responsible for cost control, quality measurement, associate development, and performance management.

Designed and developed following PCB projects using OrCad, Altium and PADS for schematics and layout:

Developed a PCB between National Instrument PXI Chassis and MEMS motion sensors for seasoning and controlling digital and analog signals. This PCB was a major success for high volume production in company’s history.

Developed TI MSP430 microcontroller base Bluetooth data collection board for Motion Sensor Evaluation kits.

Developed PCBs for drop test, shock test, centrifuge test and other environmental tests.

Developed a PCB for controlling power up voltage and timing, measuring supply current and controlling analog switches for testing MEMS microphones with using ADCs, DACs and analog switches.

Implemented following FPGA blocks using Verilog:

A controller block that utilize I2C and SPI master controllers to communicate with multiple MEMS gyros and accelerometers. The user could change communication protocol, clock speed, frame size and sampling speed. The block has a large FIFO to retain the data until it can be read by system.

16-bit microcontroller block to lower the test time. The user could program the microcontroller to access master SPI/I2C controller block to access DUTs faster and with precise timing. This project resulted $5 million per quarter savings for the company.

DDR3 memory controller to store the program and data.

A block that decodes and encodes company’s proprietary powerline communication protocol to interface with MEMS microphones.

A block that decodes TDM and PWD signals for testing microphones.

Architected and led following electro-mechanical systems design projects using AutoCAD Inventor and SolidWorks:

Gimbal base electro-mechanical MEMS production test system using brushless servo motors. Worked with in country and overseas design houses and manufacturers to implement the system and integrated it into auto-handlers.

Shock test, drop test, and centrifuge test systems. These systems use TI microcontroller and wireless (Bluetooth and Xbee) data collection modules to capture data to analyze issues.

Worked on the following software projects using C, C#, VB, Python, R-Studio and Shiny and Matlab:

Developed a function to communicate with MEMS sensors thru a SPI/I2C controller on FPGA with using National Instrument drivers and MS Visual Studio IDE.

Developed Bluetooth and Xbee wireless data transfer functions using TI Code Composer Studio.

Developed code for analyzing and publishing sensor data to understand MEMS and CMOS behavior and issues using Python, Matlab, R-Studio and Shiny.

Developed code for bench testing using Arduino IDE. Hayri U. SANLI Mountain View, CA 94040 ac01lm@r.postjobfree.com 650-***-**** Page 2/2

Actel Inc; Mountain View, CA Jan 2006 - Apr 2009 Sr. Hardware Engineer

Designed and developed burn-in and characterization test boards for different FPGA product lines and packages.

Created PCB design specifications, generated schematics using Orcad and layouts using PADS for the boards.

Managed domestic and off-shore CMs. Negotiated cost, milestones and timelines of their developments.

Implemented Verilog codes for FPGAs to control a universal test board.

Defined and conducted number of signal integrity tests for FPGA products and reported results to technical marketing for publishing technical notes.

Generated in-house series of Signal Integrity presentations to train and educate engineers internally to have better PCB and FPGA design practices.

Coached and supervised engineers in PCB and FPGA designs. Ikanos Communications, Dionex Corporation, AetherWire Corporation Aug 2002 - Jan 2006 Sr. Hardware Design Engineer - Contractor

Designed and implemented following PCBs using OrCAD and PADSs for schematics and layouts:

Test boards for VDSL Concentrator chipset.

A demo board for Ultra-Wideband (UWB) localization chipset.

An optical chromatography system with its mixed signal PCBs and FPGAs.

Collaborated with IC designers, optical, software and layout engineers to implement high quality products.

Developed codes to test and control the boards using MatLab, C and Python. Motorola Inc; Santa Clara, CA May 2001 - Aug 2002 Sr. Hardware Design Engineer

Designed and implemented DSL physical interface board for used in the Motorola router.

Created PCB schematics using ViewLogic.

Simulated the boards with Allegro-SI to improve signal integrity and fix issues. 3Com Inc, Santa Clara, CA Oct 1996 - May 2001 Sr. Hardware Design Engineer

Designed DS1/E1 IMA board and released to production 2 months before planned date. Awarded for the achievement.

Designed voice over IP board using ORCAD.

Collaborated closely with software engineers, marketing and sales teams for quick response to any customer issues and reliable product releases.

Designed IMA round robin control algorithm, DS1/E1 hardware layer and CRC32 blocks on FPGAs using Verilog.

Used OrCAD for the board schematics; Model Tech for simulation and verification; and Allegro for layout.

Wrote scripts for testing features of the boards using TCL.

Worked with manufacturing team for smooth transition from design to production phase. EDUCATION

M.S. in Electrical Engineering, San Jose State University, San Jose, CA B.S. in Electrical Engineering, Istanbul Technical University, Istanbul, Turkey SKILLS & EXPERTISE

Hardware: I2C, SPI, CAN, PCI Express, UART, XBee, Zigbee, FPGA, CPLD, DSP, DSL, ATM, IMA, Ethernet, Microprocessors, DDR, DDR2, DDR3, DPRAM, and Flash RAM. Software: Python, C, C#, C++, Java, Visual Basic, Verilog, R, MatLab. Tools: OrCAD, Altium, LabView, SOLIDWORKS, AutoCAD Inventor, FreeCAD, TI Code Composer Studio, Atmel Studio, R-Studio, Cadence Allegro-SI, HyperLynx, ActelLibero, PADS, MatLab, ModelSim. Equipment: Oscilloscope, Logic Analyzer, Network Analyzer, BERT Tester, Signal Generator, TDR Sampler and lab test equipments.



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