Perry A. Landers
** ******** ****, ******, ** K*W 1A6 613-***-**** (M)
*************@******.***
Senior Patent Analyst
Consumer Electronics, Wireless, Semiconductors
Over 14 years' Patent & Technology Analysis experience driving the
Engineering side of Patent Infringement Lawsuits, for Intellectual
Ventures, Semiconductor Insights, WiLan, Smart Disaster Response
Technologies, MCN Sports, and Greins Environmental Technologies.
Experienced in Patent Analysis, Patent Acquisition, Semiconductors (Analog
and digital), Consumer Electronics (Printing, TV, Digital Imaging),
Wireless, Electrical Systems and Reverse Engineering and tear down (with
experience in the wet and dry labs).
Demonstrated success in:
. Developing Licensing Program Acquisition, marketing data, product
infringement, heat maps, depth charts, claim chart generation
. Patent Analysis Analyzed patents of different technology sectors
(claim construction, obviousness, and licensing strength)
. Research and Acquisition Prepared market research and mined for new
patents for Licensing Programs
. Tearing Down and Reverse Engineering Semiconductors circuits ASIC,
Analog, Digital, FPGA, DSP, Memories for IP clients
. Working in the Wet and Dry Lab Tear down, decapping or depotting,
cross sections, etching, delayering, SEM
. Managing Consumer Electronics Programs
. Electrical and Electronic Device Installs and maintenance Using blue
prints and schematics, installed and maintained equipment
RELATED WORK EXPERIENCE
PAL Enterprises Inc., Ottawa 2005 - present
. Developed Mining and acquisition processes
. Drafted patent applications
. Developed Licensing Portfolios
. Assessed Licensing Opportunities
. Analyzed Technologies for Licensing
. Analyzed Markets for Licensing
. Prepared Acquisition Processes for Technology sectors
. Identified target assets for acquisition
. Organized Technology Landscapes
. Prepared Heat Maps
. Prepared Depth Charts
. Created claim charts
. Project Manager
. Performed device tear down
. Analyzed internal patent portfolio and grouped into technology sectors
. Program Manager
. Reverse Engineered, tested and created claim charts for the licensing
department
Semiconductor Insights, Kanata 2000- 2005
Reverse Engineering Analyst
. Reverse Engineered multiple semiconductor devices and circuits
. Created schematic diagrams from transistors extracted from images of
the poly and metal levels
. Created top level block diagrams from the transistor schematics
. Trained in the wet and dry lab for tear down, decapping or depotting,
SEM, cross sections, polishing
EDUCATION
Registered for 2014 Canadian Patent Agent examinations
Conditions for Patentability Training Bellevue WA 2011
Claim Language Training Bellevue WA 2010
Innography training Ottawa 2009
3 years Semiconductor Training (process, circuit design) Ottawa, 1997-2000
3 Years Electronics Engineering Technologist George Brown College Toronto
1986-1989