Technician Engineering

Jeff Heater

**** ******** ***** ( Allen, Texas **002 ( H 972-***-**** ( C (972) 740-

**** ( ******@**.**.***

SUMMARY

A performance-driven Reliability, Process, Integration Electronics

Engineering Technician in the semiconductor industry with advanced

skills and experience in lab management, tester calibrations,

equipment maintenance, ESD lab compliance, lab supplies, vendor

interface, data collection, and documentation in compliance with ISO

9000, as well as Wafer fabrication development site to production site

metrology correlation across process disciplines, including thin

films, implant, diffusion, CMP, photolithography, and plasma etch. A

competent team member who successfully ensures compliance while

supporting organizational productivity.

TECHNICAL SKILLS

Test Systems: Auto prober, Keithley S600-DSR510, HP4062, Accretech

UF3000, Cascade S300 manual prober, Agilent IV tester, pulse

generator, expander, parameter analyzer 4156c, E5270, universal

counter, Tektronix O-scope, IMP analyzer, HP frequency counters,

QualiTau-MIRA, Infinity systems.

Wafer Fabrication: KLA SEM 8300, 8100XP, 8450; KLA Tencor F5; KLA 5200

alignment; Quantox/MCLT; Accent Scatterometry-CDS200; KLA Tencor

profilometer, Verity SEM-Applied Materials; KLA Surfscan; KLA Archer

AIM/20; Optiprobe-Thermawave Series 7 7431XP, 2600, 5240, 5340;

Metapulse (Rudolph) 300X; KLA spectra CD100; Keithley S4200. Nikon

G6/G7 steppers; TEL coats/developer; Hitachi S8800/S6000/S6180 SEM;

Plasmos SD4000 Prometrix; UV-1050/HP4284A mobile ion; HP4156A bench

probe; LAM research etcher. Applied Research P5000/8300; Lam

etch/Gasonics; Branson ash; Nanospec, Nanoline; Vickers. Nikon G6/G7

C&D bodies; SVG GCA, MTI, SSI Stepper workcell/batch develop;

PerkinElmer, Canon projection printers.

EXPERIENCE

TEXAS INSTRUMENTS, INC., Dallas, Texas

Reliability Engineering Technician (External Development Manufacturing)

2009-2013

. Held responsibility for lab management; coordinating tester

calibrations with Simco, Aetrium, QualiTau, and Cascade; preventative

maintenance repairs; out of tolerance responses; maintaining

equipment; ESD lab compliance; updating lab supplies; vendor

interface; and documenting all activities per lab QSM specs for

internal and external audit compliance for ISO 9000 prep.

. Assisted engineers with collecting (wireless 65, 45, and 28nm

technology for R&D) component and circuit reliability data for

advanced WLR CMOS transistor device stress; NBTI, TDDB, CHC, and

Electromigration testing; and Relxpert model data and packaging.

Transistor Characterization Engineering Technician (EDM) 2007-2009

. Performed detailed wafer-level current-voltage and capacitance-voltage

measurements for SPICE and reliability model development of CMOS

bipolar and drain-extended transistor, capacitor, and diode

components.

. Gained familiarity with use and maintenance of Cascade S300 semi-auto

prober, Agilent 4142/4145 semiconductor parametric analyzer, and

Agilent 4284 precision LCR meters. Used MACH software for data

collection.

Integration Engineering Technician 1999-2007

. Held responsibility for successful technology transfer of 120nm, 90nm,

and 65nm CMOS technology nodes, from development to high-volume

production in DMOS6.

. Held responsibility for development site to production site metrology

correlation across all process disciplines, including thin films,

implant, diffusion, CMP, photolithography, and plasma etch.

. Provided critical data metrology between send and receiving fabs;

audited/validated metrology parameters, recipes and target locations,

and Loop Integration process release.

. Coordinated silicon movement management across multiple fabs.

. Held responsibility for hand probe wafer-level reliability, including

TDDB, BTS, mobile ion, and NBTI measurements.

. Provided optical proximity correction validation support for

photo/plasma modules.

. Performed special process engineering/integration requests, including

SRAM CDs, contact, via, metal levels, and film thickness measurements.

ADDITIONAL EXPERIENCE

Process Integration Engineering Technician, 1992-1999. Held responsibility

for daily fab movement of 0.5 to 0.25 micron CMOS logic, dRAM and flash

eprom development lots in DMOS4, DP1/DMOS5, and disposition problem

material. Held responsibility for on-wafer characterization of photo and

etch CDs, plasma etch rates, film thicknesses, and mobile ion electrical

measurements. Performed complete photo focus exposure matrix testing for

process improvement and ran Engineering tests.

Plasma Process Engineering Technician, 1991-1992. Held responsibility for

disposition of problem lots in Plasma/Probe areas in DLOGIC. Performed

etch rates, gas/RF/pressure adjustments, and process improvements and ran

Engineering tests.

Photolithography/Wet Etch Process Engineering Technician, 1984-1991. Held

responsibility for disposition of problem lots in Photo/Wet Etch areas in

DLOGIC. Held responsibility for generating stepper files, creating

develop/coat recipes, creating SEM recipes, generating resist spin curves,

and evaluating new resists and FEM tests. Photolithography Operator, 1983-

1984. Operated PerkinElmer scanner. Electronics Technician, Lubbock,

Texas, 1983. Troubleshot and repaired TI-99/4A computer.

EDUCATION

NATIONAL INSTITUTE OF TECHNOLOGY, Livonia, Michigan

Degree in Electronic Engineering Technology, 1982

PROFESSIONAL DEVELOPMENT

Basic UNIX/LINUX

Electro Static Discharge Training

ISO 9000/Audit Team Member Ethics

Chemical Safety

Cleanroom Protocol

Excel, Word, PowerPoint Training

Plasma Etch

Semiconductor Device Physics

Chemistry, Photolithography

Metallization

Equipment Troubleshooting

CVD

Cycle Time Awareness

Basic Statistical Process Control

Discrete Components

AC/DC Circuits

Physical and Chemical Concepts

DUV Stepper-Basic Operation

Technical Knowledge Development Program Certified for Technicians

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