Engineer Control
Resume:
St. Email:
Chatsworth, Ca zhoudarn@yahoo.c
Zhen Zhou
Skills Digital and analog circuit design (FPGA, ?P, DSP, A/D, DAC
etc.)
Motion control algorithm
Programming in C, VHDL, Assembly, C#, VS C++
Network protocols, RS232,USB,SPI, I C
PCB Layout (PADs)
1997- 2012 Panavision Woodland Hills, CA
Work Sr. Electronic Engineer
Experiences 65 mm film camera - Designed hardware and wrote firmware to
control the film rotary motor. Project includes schematic
design (with Orcad), use Xilinx Spartan 6 XC6SLX25 and a
motor driver A4935 (Allegro) to control a BLDC motor. Wrote
VHDL code,user IP core, and Microblaze C code to perform
close loop PID control on speed and position, decode and
response to RS232 command,interface to Graph
LCD(NHD-10032AZ)display, circuits also contains SPI
interface, A/D conversion, I C temperature sensor, and
read/write flash memory. Wrote C# for the user GUI,which
is used for debug function and monitor the status of the
camera.
PCZ lens interface - Designed schematic and wrote C code
for FREESCLE microprocessor MC9S08JM60,the main function of
the processor is to read the encoder input, control the
lens and communicate with the main controller via USB. Also
wrote a GUI (in C#) to display the status of the Lens and
provide an interface to allow the operator to change all
parameters of the Lens.
Digital Remote Exchange system - Wrote SAB80C166 firmware
of DC brushless servo control.
Millennium Extra Light Film Camera - Designed the circuits;
layout main control PCB(use PADs) and programming of Xilinx
FPGA XCS300E for all logic control. Wrote Analog Devices
DSP ADSP2187 firmware for controlling shutter and movement
motor synchronization. Wrote (Visual C++) window user
interface software for download the firmware upgrade.
High Definition Camera Lens - Designed the hardware and
wrote firmware for the control unit. Use AN2135SC 8 bit CPU
with USB port, Xilinx FPGA XCS30XL for logic control, I/Os
and motor decoder.
Modify PanaTape - (it is an ultrasonic emitter used to
measure distance). Changed the modulation by using Gaussian
envelope curve pulse, the noise is being reduced by more
than 20dB, so that it is can be used in synchronized on
site recording.
System configuration - Wrote various loader for different
system boot-up, include C167, C166, AT89S8252, Xilinx FPGA,
ADSP218x, DSP56000, TMS320C54 etc.
1988-1997 Quantum Dynamic Inc. Woodland Hills, CA
Senior Design Engineer
Developed and Implemented 'Electronic Pressure and
Temperature Computer' for Southern California Gas Co. The
unit is used for measuring the mass flow-rate of the nature
gas, recording temperature and pressure, the datum are
transmitted to the host computer in a fix time period via
modem.
Design and developed and implemented Low Temperature Two
Phase Mass Flow-meter, the project is funded by NASA. The
core of this flow-meter is a Dielectric Density Converter
(DDC), the density of the two phase medium is calculated by
detecting the capacitance of the material. I developed the
DDC from physical and mathematical module to the mechanical
structure as well as the circuits which perform capacitance
measurement. DDC was accepted by NASA as a high resolution
and high stability real time density sensing equipment.
1982-1987 Northern Jiao-Tong Universality, Beijing, China
Associate Professor
Taught University Senior level classes in Digital Signal
Processing, Computer Languages.
2004 Safe Environment Engineering Inc., Valencia, CA
Consulting Designed the circuit for Digital Position System, with TI
Projects DSP, GPS module, blue-tooth module, accelerometer, magnetic
compass, gyro and pressure sensor, the system was able to
use for accurate position recognition.
Designed, programmed and layout the PCB for a Blue-tooth
client interface module, use TI's ultra-low-power 16-bit
CPU (MSP430F147), the main task is as UART protocol
conversion with re-configurable feature.
2003 Ultra Stereo Lab. Inc., San Luis Obispo, CA
TI DSP version of the theater audio system control circuits
design and programming - The control circuitry handles 8
channels of A/D conversion, 48 channels of digital I/O,
front panel keypad User interface, interrupts input and a
256X64 dot matrix LCD display.
Real time interpolation sin/cos signal to quadrature
encoder signal using Altera Cyclone II FPGA Starter Board.
Write C code at NIOS.
Education 1977-1979 Beijing Tele-communication University,
Beijing, China
B.S. in Computer Science
GPA 4.0/4.0
1979-1982 Tsing Hua University, Beijing, China
M.S. in Optical Image Process, Department of Precision
Instrumentation
GPA 3.8/4.0
"Analysis and Design of Fiber-Optic Refractomaters"
Publication Vol.8, No. 2/ Feb 1991/J. Journal of Optical Society of
America
"Modem Signal Processing Programs" published by Scientific
Publication Co., China 1987
"CCD in Optical Super Accuracy Measurements", MS Thesis,
published on Optical Measurement Technology, Sept., 1982
Personal U.S. citizen
Reference Upon request
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