Electrical Engineering
Resume:
NATIONAL
NANOFAB CENTERRoom
Daejeon Dong-Il Moon abqq75@r.postjobfree.com
EDUCATION
KAIST, Daejeon, Korea
Sep. 2010 - present :
Ph.D. candidate in Department of Electrical
Engineering, GPA: 4.0 / 4.3
Course work included:
Modern Physics for Engineers
(Advisor : Yang-Kyu
Choi)
Korea Advanced Institute of Science and Technology, Daejeon, Korea
Sep. 2008 - Aug. 2010 :
M.S. in Department of Electrical Engineering,
GPA: 4.0 / 4.3
Course work included:
Introduction to VLSI devices, Advanced MOS device physics, Integrated circuit
process, Electronics lab, Technical writing.
(Advisor : Yang-Kyu
Choi)
Thesis : A Study of
Geometric Dependence for BJT-based 1T-DRAM
Kyungpook National University, Daegu,
Korea
Mar. 2003 - Aug. 2008 : B.S. in Departments of Electrical
Engineering and Computer Science,
GPA : 4.15 / 4.3
Graduation with honor
of cum laude
RESEARCH
INTERESTS
Nano-scale device ranging from device design
to process development, simulation, and characterization.
Device
physics:
Floating-body effects in nano-scale devices
including MOSFETs, BJTs, Si-NWs.
Memory
area: Capacitor-less
1T-DRAM, non-volatile memory, and Unified-RAM (URAM).
Novel
device:
Silicon photonic device, junctionless transistor,
vertically stacked silicon nanowires, and FET-based bio sensors.
RESEARCH
EXPERIENCES
Plasma Display Panel (PDP) Operating Circuit Design,
Feb. 2007 ~ Aug. 2007.
Terabit Nonvolatile Memory Development, Aug.
2008 ~ Jul. 2011.
Development of a novel actuation mode of flexible display and
investigation of characteristic improvement, Aug.
2008 ~ Mar. 2012.
Jul. 2009 ~ Jun. 2011.
Trans-scale convergence technology for nanodevices, Aug.
2008 ~
Exploration of Nano-Fusion Memory Technology, Jun.
2009 ~
Development of novel 3D stacked devices and core materials for the
next generation flash memory, Mar. 2010 ~
Metal-silicidation S/D for enhanced
performance of the 3D stacking memory device, Jul.
2010 ~
IT-Driven Nature Mimetic Technology, Jun.
2011 ~
Development of Novel Ultra-Low Power Electronic Devices, Sep.
2011 ~
Peripheral Transistor Full Salicidation, Oct.
2011 ~
SKILLS
Numerical
computation and data analysis experience with MATLAB, LabView,
Origin, and C language.
Device
and process simulation experience with TCAD, ATLAS, ATHENA.
Layout
experience with Cadence.
Experience
with CMOS device fabrication equipments including
deep RIE, KrF scanner, CMP, RTP, aligner, furnace,
sputter, dry/wet etching, and etc.
Analysis
equipments including In-line CD-SEM, FB-SEM, AFM,
FIB, and TEM.
PUBLICATIONS
Foreign Journals
1. Dong-Il Moon,
Sung-Jin Choi, Juan P. Duarte, and Yang-Kyu Choi, "Silicon Nanowire Gate-All-Around
Junctionless Transistor Built on a Bulk Substrate
", IEEE Electron Device Letters,
Submitted.
2. Juan P. Duarte,
Sung-Jin Choi, Dong-Il Moon,
Jae-Hyuk Ahn, Jee-Yeon Kim, Sungho Kim, and
Yang-Kyu Choi, " A Universal Core
Model for Multiple-Gate Field-Effect-Transistors. Part II: Drain Current
Model", IEEE Transactions on Electron Devices,
Submitted.
3. Juan P. Duarte,
Sung-Jin Choi, Dong-Il Moon,
Jae-Hyuk Ahn, Jee-Yeon Kim, Sungho Kim, and
Yang-Kyu Choi, " A Universal Core
Model for Multiple-Gate Field-Effect-Transistors. Part I: Charge Model",
IEEE Transactions on Electron Devices,
Submitted.
4. Jae-Hyuk Ahn, Jee-Yeon
Kim, Kyungyong Choi, Dong-Il Moon, Chang-Hoon Kim, Myeong-Lok
Seol, Tae Jung Park, Sang Yup Lee, and Yang-Kyu
Choi, "Nanowire FET Biosensors on a Bulk Silicon Substrate ", IEEE Transactions on Electron Devices,
Submitted.
5. Jin-Seong Lee, Sung-Jin Choi, Dong-Il Moon, and Yang-Kyu Choi, "Source and Drain
Junction Engineering for Capacitorless DRAM", IEEE Electron Device Letters, Submitted.
6. Moon-Seok Kim, Sung-Jin Choi, Dong-Il Moon, Juan Pablo Duarte, Sungho
Kim, and Yang-Kyu Choi, "Investigation of Gate Length and Fringing Field
Effects for Program and Erase Efficiency in Gate-All-Around SONOS Memory
Cells", Solid State Electronics,
Accepted.
7. Sung-Jin Choi, Dong-Il Moon, Juan P. Duarte,
Jae-Hyuk Ahn, and
Yang-Kyu Choi, "Physical observation of a thermo-morphic
transition in a silicon nanowire", ACS Nano,
Vol. 6, No. 3, pp. 2378-2384, Feb. 2012.
8. David J. Baek, Myeong-Lok Seol, Sung-Jin Choi, Dong-Il
Moon, and Yang-Kyu Choi, "Nonvolatile memory with graphene oxide as a charge storage node in nanowire field
effect transistors", Applied
Physics Letters, Vol. 100, No. 9, p. 093106, Feb. 2012.
9. Juan P. Duarte,
Sung-Jin Choi, Dong-Il Moon,
and Yang-Kyu Choi, "Simple Analytical Bulk Current Model for
Long-Channel Double-Gate Junctionless
Transistors", IEEE Electron
Device Letters, Vol. 32, No. 6, pp. 704-706, Jun. 2011.
10. Jee-Yeon Kim, Jae-Hyuk Ahn, Dong-Il
Moon, Sungho Kim, Tae Jung Park, Sang Yup
Lee, Yang-Kyu Choi, "A dual-gate field-effect transistor for label-free
electrical detection of avian influenza", BioNanoScience, Vol. 2, No. 1, pp. 35-41, Feb. 2012.
11. Sungho Kim, Sung-Jin Choi, Dong-Il Moon, and Yang-Kyu Choi, "Carrier lifetime
engineering for floating-body cell memory", IEEE
Transactions on Electron Devices, Vol. 59, No. 2, pp.
367-373, Feb. 2012.
12. Sungho Kim, Sung-Jin Choi, Dong-Il Moon, and Yang-Kyu Choi, "A new
charge-pumping technique for double-gated SOI MOSFET using pulsed drain
current transient", IEEE
Transactions on Electron Devices, Vol. 59, No. 1, pp.
241-246, Jan. 2012.
13. Myeong-Lok Seol, Sung-Jin Choi,
Chang-Hoon Kim, Dong-Il Moon,
and Yang-Kyu Choi, "Porphyrin-silicon hybrid
field-effect transistor with individually addressable top-gate
structure", ACS Nano, Vol. 6, No.
1, pp. 183–189, Dec. 2011.
14. Sung-Jin Choi,
Tae-Hong Kwon, Hwon Im, Dong-Il Moon, David J. Baek, Myeong-Lok Seol, Juan P. Duarte, and Yang-Kyu Choi, "A polydimethylsiloxane (PDMS) sponge for the selective
absorption of oil from water", ACS Applied
Materials & Interfaces, Vol. 12, No. 3, pp.4552-4556,
Nov. 2011.
15. Dong-Il Moon,
Sung-Jin Choi, Sungho Kim, Jae-Sub Oh, Young-Su
Kim, and Yang-Kyu Choi, "Vertically integrated unidirectional biristor", IEEE
Electron Device Letters, Vol. 32, No. 11, pp. 1483-2485,
Nov. 2011.
16. Sungho Kim, Sung-Jin Choi, Dong-Il Moon, and Yang-Kyu Choi, "An extraction
method of the energy distribution of interface traps by an optically assisted
charge pumping technique", IEEE
Transactions on Electron Devices, Vol. 58, No. 11, pp.
3667-3673, Nov. 2011.
17. Sung-Jin Choi,
Young-Chul Lee, Myeong-Lok
Seol, Jae-Hyuk Ahn, Sungho Kim, Dong-Il Moon, Jin-Woo Han,
Stephen Mann, Ji-Won Yang, and Yang-Kyu Choi,
"Bio-inspired complementary photoconductor by porphyrin-coated
silicon nanowires", Advanced
Materials,Vol.
23, No. 34, pp. 3979-3983, Sep. 2011.
18. Juan P. Duarte,
Sung-Jin Choi, Dong-Il Moon,
and Yang-Kyu Choi, "Simple Analytical Bulk Current Model for
Long-Channel Double-Gate Junctionless
Transistors", IEEE Electron
Device Letters, Vol. 32, No. 6, pp. 704-706, Jun. 2011.
19. Sung-Jin Choi, Dong-Il Moon, Sungho Kim, Jae-Hyuk Ahn, Jin-Seong Lee, Jee-Yeon Kim, and Yang-Kyu Choi, "Nonvolatile Memory
by All-Around-Gate Junctionless Transistor Composed
of Silicon Nanowire on Bulk Substrate", IEEE
Electron Device Letters, Vol. 32, No. 5, pp. 602-604, May
2011.
20. Dong-Il Moon, Sung-Jin Choi, Chung-Jin Kim, Jee-Yeon
Kim, Jin-Seong Lee, Jae-Sub Oh, Gi-Sung
Lee, Yun-Chang Park, Dae-Won Hong, Dong-Wook Lee, Young-Su Kim, Jeoung-Woo
Kim, Jin-Woo Han, and Yang-Kyu Choi, Silicon Nanowire All-Around Gate
MOSFETs Built on a Bulk Substrate by All Plasma Etching Routes,IEEE Electron Device Letters,
Vol. 32, No. 4, pp. 452-454, Apr. 2011.
21.
Sung-Jin Choi, Jae-Hyuk Ahn,
Jin-Woo Han, Myeong-Lok Seol,
Dong-Il Moon, Sungho Kim, and Yang-Kyu
Choi, "Transformable Functional Nanoscale
Building Blocks with Wafer-Scale Silicon Nanowires", Nano letters, Vol. 11, No. 2, pp.
854-859.
22.
Sung-Jin Choi, Dong-Il Moon, Sungho Kim, Juan P. Duarte,
and Yang-Kyu Choi, "Sensitivity of Threshold Voltage to Nanowire Width
Variation in Junctionless Transistors", IEEE Electron Device Letters, Vol. 32, No. 2, pp. 125-127,
Feb. 2011.
23. Sung-Jin
Choi, Jin-Woo Han, Sungho Kim, Dong-Il Moon, Moongyu
Jang, and Yang-Kyu Choi, Dopant-Segregated Schottky
Source/Drain FinFET with a NiSi
FUSI Gate and reduced leakage current, IEEE Transaction on Electron Devices, Vol. 57, No. 11, pp 2902-2906, Nov. 2010.
24. Dong-Il Moon, Sung-Jin Choi, Jin-Woo Han, Sungho
Kim, and Yang-Kyu Choi, "Fin Width Dependence of BJT-based 1T-DRAM
Implemented on FinFET,"IEEE
Electron Device Letters, Vol.
31, No. 9, pp. 909-911, Sep. 2010.
25.
Sung-Jin Choi, Jin-Woo Han, Dong-Il Moon, Sungho
Kim, Moongyu Jang, and Yang-Kyu Choi
"P-channel Nonvolatile Flash Memory with the Dopant-Segregated Schottky-Barrier Source/Drain", IEEE Transactions on Electron Devices, Vol. 57, pp. 1737-1742,
Jul. 2010.
26. Dong-Il Moon, Sung-Jin Choi, Jin-Woo Han, and Yang-Kyu Choi, "An
Optically Assisted Program Method for Capacitorless
1T-DRAM," IEEE
Transactions on Electron Devices, Vol. 57, No. 7,
pp.1714-1718, Jul. 2010.
27. Sung-Jin
Choi, Jin-Woo Han, Dong-Il
Moon
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