JOSEPH LEE GREATHOUSE

Austin, TX ***** abqpt5@r.postjobfree.com

Education

University of Michigan, Ann Arbor

Ph.D. Computer Science and Engineering May 2012

Advisor: Prof. Todd Austin

Dissertation topic: Hardware Mechanisms for Distributed Dynamic Software Analysis

University of Michigan, Ann Arbor

M.S.E. Computer Science and Engineering May 2008

Hardware Systems Concentration GPA: 7.73/9.0 (3.79/4.0)

University of Illinois at Urbana-Champaign

B.S. Computer Engineering with Honors May 2006

Minor: International Engineering Japanese GPA: 3.71/4.0

Work Experience

September 2012 Present

Advanced Micro Devices, Inc. Senior Design Engineer

I perform computer architecture research within the advanced development team of AMD R&D.

May 2007 August 2012

University of Michigan Research Assistant

Identified methods of distributing security and correctness analyses to many users to reduce slowdown.

Managed graduate and undergraduate students through the development of prototype systems.

January 2012 April 2012

University of Michigan Teaching Assistant

Led discussions and evaluated projects for graduate level parallel computer architecture course.

May 2010 October 2010

Kelly Services / Intel Corp. Research Contractor

Researched approaches for improving the speed and accuracy of the Intel Inspector XE data race detector.

Utilized unique features of Intel processors to yield orders-of-magnitude performance gains.

May 2008 August 2008

International Business Machines Corp. Speed Team Intern

Designed and constructed an InfiniBand compliance verification suite that caught numerous bugs.

Instituted suite use into the IBM PowerVM I/O firmware development process.

January 2005 August 2006

University of Illinois Teaching Assistant

Taught discussion sections and graded for undergraduate computer architecture and digital logic courses.

Publications

Andrea Pellegrini, Joseph L. Greathouse, Valeria Bertacco, Viper: Virtual Pipelines for Enhanced Reliability,

in the Proceedings of the 39th Annual International Symposium on Computer Architecture (ISCA), June 2012

Joseph L. Greathouse, Hongyi Xin, Yixin Luo, Todd Austin, A Case for Unlimited Watchpoints, in the

Proceedings of the 17th International Conference on Architectural Support for Programming Languages and

Operating Systems (ASPLOS), March 2012

Joseph L. Greathouse, Zhiqiang Ma, Matthew I. Frank, Ramesh Peri, Todd Austin, Demand-Driven Software

Race Detection using Hardware Performance Counters, in the Proceedings of the 38th Annual International

Symposium on Computer Architecture (ISCA), June 2011

Joseph L. Greathouse, Todd Austin, Position Paper: The Potential of Sampling for Dynamic Analysis, in the

Proceedings of the 6th ACM SIGPLAN Workshop on Programming Languages and Analysis for Security

(PLAS), June 2011

Joseph L. Greathouse, Chelsea LeBlanc, Todd Austin, Valeria Bertacco, Highly Scalable Distributed Dataflow

Analysis, in the Proceedings of the 2011 International Symposium on Code Generation and Optimization

(CGO), April 2011 (Awarded Best Student Presentation at CGO2011)

Joseph L. Greathouse, Ilya Wagner, David A. Ramos, Gautam Bhatnagar, Todd Austin, Valeria Bertacco and

Seth Pettie, "Testudo: Heavyweight Security Analysis via Statistical Sampling," in the Proceedings of the 41st

Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), November 2008

Research Projects

Unlimited Watchpoint Hardware

Analyzed a large collection of software tools in order to build a general HW acceleration mechanism.

Designed a hardware system that offers virtually unlimited numbers of fine-grained data watchpoints.

Built a trace-based simulation system to quickly test multiple hardware designs with numerous tools.

Dynamic Dataflow Analysis Sampling

Designed hardware and software systems that lower software analysis overheads through sampling.

Implemented a software system using QEMU and Xen that allowed high-quality analysis sampling.

Demand-Driven Dynamic Data Race Detection

Utilized hardware performance counters to dynamically observe shared memory accesses.

Integrated this into Intel Inspector XE race detector, yielding large speedups when little sharing occur s.

Computer Languages and Software Experience

Programming Languages

C, C++, x86 assembly, Perl, Verilog

Software Systems

Linux, Xen, and Solaris kernels, QEMU emulator internals, USB firmware, Pin binary instrumentation

Simulator Environments

SimpleScalar, Virtutech Simics, gem5

Relevant Coursework

Computer Architecture Parallel Computer Architecture

Microarchitecture Enterprise Systems

Advanced Operating Systems Advanced Compilers

Computer-Aided Design and Verification of Digital Systems VLSI Design

Electronic Circuits IC Device Theory and Fabrication

Awards and Honors

Eta Kappa Nu Electrical & Computer Eng. Honor Society Tau Beta Pi Engineering Honor Society

Illinois Chancellor s Scholar Illinois Engineering James Scholar

University of Michigan EECS Departmental Fellowship 2006-2007

2011 International Symposium on Code Generation and Optimization Best Student Presentation Award

2011 University of Michigan Computer Science and Engineering Graduate Student Honors Competition, 1st Place

Associations and Activities

Institute of Electrical and Electronics Engineers Association for Computing Machinery

University of Michigan Advanced Computer Architecture Laboratory Reading Group administrator 2009-2010

University of Michigan Advanced Computer Architecture Laboratory compute cluster administrator 2008-2011

External reviewer for ASPLOS (2012), CODES (2011), DATE (2008--2012), FMCAD (2010), HPCA (2009,

2010, 2012), ISCA (2009, 2010, 2012), MICRO (2008, 2009, 2011, 2012), and PACT (2012)

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