Engineering Design

Name Hiroaki Yamaoka

Affiliation Dept. of Electronics Eng., the University of Tokyo, Asada Lab.

Access Address : Dept. of Electronics Eng., the University of Tokyo,

*-*-* *****, ******-ku, Tokyo 113-8656, Japan. (Office)

Phone : +81-3-5841-6771

Fax : +81-3-5841-8912

E-mail : yamaoka[AT]silicon.u-tokyo.ac.jp

Current Research Activity Design of High-Performance CMOS Digital Circuits and Logic Synthesis

EducationPh.D. Degree in Electronics Engineering (Apr. 2001 - Mar. 2004) The University of Tokyo, Tokyo, Japan. Advisor: Prof. Kunihiro Asada.M.S. Degree in Electronics Engineering (Apr. 1999 - Mar. 2001) The University of Tokyo, Tokyo, Japan. Advisor: Prof. Kunihiro Asada.B.S. Degree in Electronics Engineering (Apr. 1997 - Mar. 1999) The University of Electro-Communications, Tokyo, Japan. Advisor: Prof. Riichiro SaitoA.S. Degree in Electronics Engineering (Apr. 1992 - Mar. 1997) Tokyo National College of Technology, Tokyo, Japan. Advisor: Prof. Tomohiko OhtsukaProfessional ExperienceAvant!Corporation (RTP Office), Durham, NC.Intern, (Oct. 2001 - Dec. 2001).Development of Mixed Signal Custom Design Tool Cosmos.Supervisor: Keith Lanier Jr.SkillsPlatforms: Solaris, Linux, and WindowsHardware Description Languages: VHDL and Verilog-HDLProgramming Languages: C/C++, Tcl, Perl, and MatlabCAD Tools: Cadence: Design Framework II, Dracula, Diva, Verilog-XL Synopsys: Design Compiler, FPGA Compiler II, Apollo II, HSPICE, Star-Sim, and CosmosLanguages: Japanese, Englishyamaoka[AT]silicon.u-tokyo.ac.jp