Engineer Design

Jayanta Kumar Ray

Department of Geomatics Engineering,

The University of Calgary, Calgary, AB, CANADA

Phone : 403-***-**** (off). 403-***-**** (res)

Fax : 403-***-**** (off). Email : abqgnm@r.postjobfree.com

Objective

Seeking a challanging and rewarding position in the area of GPS Hardware or Software Development and/or Digital Signal Processing in an innovative, high technical company

Academic Qualification

Ph.D. Candidate The University of Calgary, Calgary, Alberta, Canada, April 2000 (expected)

Major: Positioning and Navigation

Dissertation: Characterization and Mitigation of GPS Multipath

M.Tech. Indian Institute of Science, Bangalore, India, January 1997

Major: Electronics Design and Technology

Project: Integrated Navigation System

B.E. Bangalore University, Bangalore, India, August 1992

Major: Electronics

Project: Test Zig to Test Maintenance Card Used in MILT-64 Telephone Exchange

Professional Experience

July 1994 - July 1995 and February 1997 to May 1997

Senior R&D Engineer

Accord Software and Systems Private Limited, Bangalore, India

March 1993 - June 1994

R&D Engineer,

Accord Software and Systems Private Limited, Bangalore, India

August 1992 February 1993

Trainee Hardware Engineer

Accord Software and Systems Private Limited, Bangalore, India

Research and Development Experiences GPS receiver hardware design and development

GPS receiver signal and data processing algorithms design and development

GPS code and carrier phase multipath characterization and mitigation

GPS and other low cost sensors integration

CPU based board and real time embedded system design and development

Digital signal processing and digital signal processors

Kalman filtering, least square and other conventional and non-conventional estimation techniques

Honours and Awards

Institute of Navigation s Best Student Paper Award at the 12th International Technical Meeting at Nashville, TN, USA, September 1999.

Institute of Navigation s Best Paper Award at the 11th International Technical Meeting at Nashville, TN, USA, September 1998.

CEDT Design Medal for the best M.Tech. Student at Centre for Electronics Design and Technology (CEDT), Indian Institute of Science, 1995-1997.Accord Recognition Award for the best R&D Engineer of the organization, December 1993 and December 1994.98.46 Percentile in All India Graduate Aptitude Test for Engineers, India, February 1994.10th Place in Bangalore University (comprising of 16 Engineering Colleges), 1988-1992.7th Place in Grade XII Public Examination in Tripura State, India, March 1988.

Scholarships and Bursaries

Province of Alberta Graduate Fellowship, The University of Calgary, 1999.

Graduate Research Scholarship, The University of Calgary, 1999.

Geomatics Canada Scholarship, Canadian Institute of Geomatics, 1999.

University Technologies International Inc. Fellowship, The University of Calgary, 1999.

Graduate Research Scholarship, The University of Calgary, 1998.

Canadian Natural Resources Limited Graduate Scholarship, The University of Calgary, 1998.

Nesbitt Burns Inc. Graduate Scholarship, The University of Calgary, 1998.

Faculty of Graduate Studies Fee Scholarship, The University of Calgary, 1998.

Special Award, The University of Calgary, 1997.

Samsung Scholarship, Indian Institute of Science, 1996.

Tripura State Government Merit Scholarship, Bangalore University, 1988 to 1992.

Publications

Refereed Journal

Ray, J.K., M.E. Cannon and P. Fenton (1998), Mitigation of Static Carrier Phase Multipath Effects Using Multiple Closely-Spaced Antennas. Submitted to Navigation: Journal of the Institute of Navigation, September 1998.

Ray, J.K, O.S. Salychev, M.E. Cannon (1998), The Modified Wave Estimator as alternative to Kalman Filter for Real time GPS/GLONASS-INS Integration, Submitted to Journal of Geodesy, April 1998.

Conference Proceedings

Ray, J.K., (1999), Use of Multiple Antennas to Mitigate Carrier Phase Multipath in Reference Stations, Proceedings of ION GPS-99, Nashville, September 14-17, (in press), (winner of an ION Best Student Paper Award).

Ray, J.K., M.E. Cannon and P. Fenton (1999), Code Range and Carrier Phase Multipath Mitigation Using SNR, Range and Phase Measurements in a Multi-antenna System, Proceedings of ION GPS-99, Nashville, September 14-17.

Ray, J.K. and M.E. Cannon (1999), Characterization of Carrier Phase Multipath, Proceedings of ION National Technical Meeting, San Diego, January 25-27, pp. 343-352.

Ray, J.K., M.E. Cannon and P. Fenton (1998), Mitigation of Static Carrier Phase Multipath Effects Using Multiple Closely-Spaced Antennas, Proceedings of ION GPS-98, Nashville, September 15-18, pp. 1025-1034, (winner of an ION Best Paper Award).

Patent

The Technology of Mitigating Static Carrier Phase Multipath Using Multiple Closely-Spaced Antennas (pending)

Professional Skills

Hardware

Design and development of CPU based boards using Analog Devices Digital Signal Processors (ADSP 21XX and ADSP 21XXX families of processors).

Design and development of CPU based boards using Intel 808x and 80x86 processors.

Intel Microcomputer 8031, 8051.

Computer internals and Add-on cards.

Digital Logic Analyzer, Spectrum Analyzer, GPS Signal Simulator etc.

Software

Structured software design using DFD, CFD, structure chart etc.

Assembly language programming for Analog Devices DSP processors.

Assembly language programming for Intel processors.

C, C++ in DOS and Unix environment.

VHDL hardware design language for EPLD, FPGA design.

Summery of Work Experience

1. Test shells for certification of DGPS as Flight Inspection Systems (Dec 1997 to Mar 1998)

Software test shells to generate statistical information of availability, accuracy and probability of incorrect positioning solution detection of a DGPS, developed at the Department of Geomatics Engineering, The University of Calgary for Aerodata Flugmeb

technik GmbH, Braunschweig, Germany. Responsibilities included design and development of the test shells and their testing and evaluation with field data.

2. Auto Sensor Lab (Feb 1997 to May 1998)

A software package to simulate GPS and dead reckoning sensors like Odometer and Gyroscope in a simulated moving vehicle environment. This is now available as product at Navtech Seminars, Alexandria, VA. Responsibilities included analysis and design of the error models of various sensors and software testing and evaluation.

3. Global Positioning Systems Receiver ( May 1993 to Jul 1995)

Design and development of the core technology of a completely digital, high precision, Global Positioning System Receiver (GPSR). It is a multi-channel Standard Positioning System Receiver and built around a Digital Signal Processor. Its unique features include, a single chip solution whereby most of the conventional hardware functions (correlator, costas loop etc.) have been realized in software and has a very fast Time to First Fix (TTFF) due to FFT technique for acquisition. Accord is the first company in India to successfully develop a commercial GPS receiver indigenously and one of the very few companies in the world to have software solution. It is developed in collaboration with Analog Devices Inc., USA.

Responsibilities included,

Leading a team of R&D Engineers for implementation and testing of various hardware and software modules of GPSR

Design, implementation and testing of GPSR Hardware based on GP1020 correlator from GEC Plessey and ADSP21000 processor from Analog Devices

Design, implementation and testing of GPSR Hardware with "Soft Correlator" based on ADSP21062 processor

Design alterations in the three iterations of the GPSR board for performance improvements and reduction of cost and size

Design of Software Requirement Specification (SRS) for GPSR software

Algorithm development, implementation and testing of continuous code and carrier tracking, satellite data extraction and management, satellite selection and their position computation, measurement data formation, user position, velocity computation and clock correction using Least Square and Kalman Filter etc.

System integration, testing and evaluation

4. GPSR Correlator Simulator (Jan 1993 to Apr 1993)

A powerful software package to understand the characteristics of GPS signal and GPS Receiver technology. It provides a sound platform to experiment with various modules of the signal processing section in a GPS receiver. It allows the user to alter parameters like code and carrier frequency, phase, resolution etc., sampling frequency, noise content in the signal etc. This is available as a product at Navtech Seminars, Alexandria, VA. My responsibilities included design of Software Requirement Specifications, develop and test some of the modules of the software.

5. Testability and Loading analysis of an Electronic System (Aug 1992 to Dec 1992)

Testability and Loading analysis of an Electronic warfare system under the most critical conditions. The system was developed at Advance System Integration and Evaluation Organization (ASIEO), Ministry of Defense, Govt. of India. Responsibilities included analysis of four critical cards of the system and preparing complete test procedures for fault detection and correction of those cards.

6. Other Projects

A few of the small projects executed and/or supervised by me are,

PC Add-on-card for LCD display module for GPSR.

Switch mode regulated power supply.

Design of a computer architecture using Tomasolu's algorithm in VHDL

Design and implementation of a FIFO memory in VHDL

Student Projects

M.Tech Project - Integrated Navigation System (InteNS)

It is a Land vehicle navigation system, which integrates Global Positioning System Receiver with Dead Reckoning Sensors, namely, Odometer and Gyroscope. The system employs a Kalman filter to determine the optimum position of the vehicle, taking raw data from each of the sensors. It also, determines the drift and other errors in individual sensors in a statistical sense. This is done under the guidance of Prof. H. S. Jamadagni, Chairman, Centre for Electronics Design and Technology, Indian Institute of Science.

B.E. Project - Test Zig to test Maintenance Card used in MILT- 64 Telephone Exchange

Built hardware and associated software for automatic testing of Maintenance Card used in MILT-64 telephone exchange. It is an Intel 8085 processor based card encompassing circuits like Tone generator, Relay network, Coder and Decoder etc. This is done at Indian Telephone Industries Limited, Bangalore, India.

References

Available upon request

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