Nadav Rotem
abqdzo@r.postjobfree.com Heinrich Heine **A, Haifa, 34485, Israel
http://cs.haifa.ac.il/~rotemn/ Phone: 077-******* Cell: 054-*******
Education
Haifa University, Israel PhD Candidate Computer Science
2006 2008
Haifa University, Israel MSc Computer Science
2002 2003
Tel Hai College, Israel BSc Computer Science
2000 2002
California State University BSc Studies Computer Science
Sacramento, United States
Experience
Intel Software Developer 2010-Present
Worked on the Intel OpenCL compiler team on autovectorization and LLVM compiler improvements.
Developed the OpenCL Vectorizer (central component of the OpenCL SDK). Worked with the open
source community on improving the LLVM compiler for Intel Architectures. These changes include:
code generator vector improvements, changes to the LLVM intermediate representation (IR),
additional instruction set support, and general compiler optimizations.
Skills/Tools: C++, OpenCL, LLVM, Compiler Development
Military Intelligence Senior Software Developer 2004 - 2010
2006 2010: HPC/Embedded
Led a small team of embedded software developers. Wrote Linux kernel drivers for embedded
systems. Optimized code in assembly for a large scale cluster. Led the evaluation process of HPC
product by different vendors. Developed the software for FPGA acceleration systems.
Skills/Tools: C/C++, Python, Linux Kernel, Assembly, Verilog, Xilinx (EDK, Chipscope)
2004-2006: Information Security
Developed low-level security-related software for windows.
Skills/Tools: C/C++, Security
Freelance Independent Consultant 2002-2004
Developed the Open Text Summarizer, an open source tool for summarizing text, which has been
included in major Linux distributions (http://libots.sf.net).
Advised various companies in the field of natural language processing (NLP) and data mining.
Skills/Tools: Java, Python, C.
Siftology Inc. Intern 2002
Worked as an intern in the field of natural language processing (NLP).
Skills/Tools: Perl, XML
Academic Publications
1. Hybrid Type-Legalization for improved code generation for vector-architectures (under review).
2. Using Memory Profile Analysis for Automatic Synthesis of Pointers Code (TECS), October
2011.
3. Optimizing Wait-States in the Synthesis of Memory References with Unpredictable Latencies
(SAMOS XI), May 2011.
4. Combining static and dynamic array detection for binary synthesis with multiple memory ports
(JDAES), January 2011.
5. Automatic Memory Partitioning: Increasing Memory Parallelism via Data Structure Partitioning
(CODES+ISSS), October 2010.
6. Reducing Memory Constraints in Modulo Scheduling Synthesis for FPGAs (TRETS), September
2010.
7. Finding the Best Compromise in Compiling Compound Loops to Verilog (JSA), September
2010.
8. Binary Synthesis with Multiple Memory Banks Targeting Array References (FPL), August 2009.
9. The Effect of Unrolling and Inlining for Python Bytecode Optimizations (SYSTOR), May 2009.
10. Synthesis for Variable Pipelined Function units (SOC 2008), November 2008.
Other
LLVM Committer.
Israeli Army Rank: Captain.
References available upon request