MARK PROULX

Contract or Direct HW Engineer

** ***** **** **.

Bow, NH 03304

603-***-**** (h)

603-***-**** (c)

abqclw@r.postjobfree.com

HIGHLIGHTS OF QUALIFICATIONS

** ***** ** ******** ****** experience. Board and logic (ASIC and CPLD).Experience in ATM, POS, SONET/SDH, PDH (DS3/E3, T1/E1), IEEE 802.3 (Ethernet, 10M/100M/1000M/10Gbps), DSL, FDDI, Fibre Channel and GPON.Designed dozens of high-speed printed circuit boards from specification to manufacture.Extensive lab troubleshooting and problem solving experience.Schematic capture/pcb layout tool experience: OrCad, Cadence Concept, ViewLogic/ViewDraw/DxDesigner, Mentor Graphics and Allegro.HW technologies: xTTL, xCMOS, xECL, LVDS, CML, HSTL, SSTL, GTL.Embedded protocols/architectures/interfaces: PCI, SPI, I2C, UTOPIA, POSPHY, DDRx, SRIO and XAUI.

PROFESSIONAL EXPERIENCE

Boston Design Solutions – Hardware Bring-up and Verification (12/08-4/09 contract)

Processor Boards

Bring-up of recently redesigned (by other engineer) processor board set.

Mother board included Broadcom Sibyte processor, embedded DDR2 DRAM, Cortina 10G MAC/PHY, PLX HyperTranspot/PCI-X bridge, Tundra PCI-X/VME bridge.

XMC Daughter board included 2 Broadcom Sibyte processors, DDR2 DRAM.

Wrote HW acceptance test plan.

Switch Board

Managed recently redesigned (by other engineer) Switch board. Used for processor board (above) chassis interconnect.

Included Broadcom Sibyte processor, embedded DDR DRAM, Fulcrum FM3xxx 1G/10G switches, 10Gbps SFP+ fiber optic ports.

Directed subcontracts for front panel design, thermal analysis and heatsink design.

Pannaway Technologies, Portsmouth NH – Hardware Design (3/06-11/08, 2.5 yrs)

GPON (2.5Gbps Fiber Optic) OLT Card HW Design

Multi-port GPON OLT blade for a modular chassis. 10Gbps backplane connectivity. Included: Freescale MPC8347, DDR2 DRAM, Broadcom BCM56580, BroadLight BL3458 quad GPON OLT controller, SFPs, DC/DC converters, Altera CPLD.

Regulatory Compliance Certification

Lead effort of getting new 20 slot chassis and modules through regulatory compliance certification including CSA (safety), FCC and NEBS.

ADSL2/POTS Card HW Design

ADSL2/POTS blade for a modular chassis. Included redesign of an Altera CPLD. Wintegra processor. Conexant ADSL A/Ds and DSPs.

Thermal Test Card HW Design

Thermal load board for chassis heat management analysis.

Mercury Computer, Chelmsford, MA – Hardware Design (9/05-3/06, 6 mos contract)

Chassis System Electrical Architecture/Design

Started architecture/development of a VITA 46 (VME-based) 8 slot, 3U chassis including backplane. Intended to contain switch, processor and RF cards to be used for military applications. Project cancelled.

Xilinx CPLD Design

Wrote specification, wrote Verilog code, synthesized and performed verification for a common architecture CPLD. The CPLD interfaced a Freescale MPC8548 Local Bus. The CPLD had control and status SW registers. The CPLD also performed miscellaneous functions.

Design Debug, Bring-up and Verification

Emergency take-over of a new design. Serial RapidIO Xbar board using Tundra Tsi568 devices. Edited VHDL code targeting Xilinx CPLDs.

Paradyne, Portsmouth, NH – Hardware Design (4/05-9/05, 6 mos contract)

Design Debug and Verification

Troubleshot Ethernet, DSL and T1/E1 designs. Resolved issues associated with DSL and T1/E1 ports, Altera CPLDs, Conexant physical layer components and Freescale PowerPC processors.

Sycamore Networks, Chelmsford, MA – Hardware Design (10/04-4/05, 6 mos)

ATM & Ethernet Product HW Architecture

Investigated architecture possibilities for ATM and Ethernet implementations for existing SONET/SDH modular chassis.

Broadbus Technologies, Inc., Boxborough, MA – Hardware Design (10/02-3/04, 1.5 yrs)

Gigabit Ethernet (1.25Gbps Fiber Optic) Video Distribution Board HW Design

Wrote HW specification for, designed and debugged a 4 port Gigabit Ethernet video distribution board. Used the following devices – PMC-Sierra PM3387 1xGE GMAC, Xilinx Virtex-II, IBM 440GP PowerPC processor, DDR SDRAM, SRAM, Flash and SFPs.

Fibre Channel (2.2Gbps Fiber Optic) Video Ingest Board HW Design

Wrote HW specification for, designed and debugged a 4 port Fibre Channel video ingest board. Used the following devices – Agilent Tachyon XL2, Xilinx Virtex-II, IBM 440GP PowerPC processor, DDR SRAM, Flash and SFPs.

SANport Networks, Inc., Nashua, NH – Hardware Architecture/Design (12/01-9/02, 9 mos)

This company was never funded. A colleague and I started this company.

SAN Extension Product HW Architecture

Architected a multi-port Fibre Channel gateway product. Studied ITU Fibre Channel standards. Started schematic for the main board of the system. Planned to use the following devices – Qlogic FibreFIT490 Fibre Channel port controller, AMCC Rhine 4 port POS/ATM Sonet OC-12 framer, Motorola MPC8250 and MPC860 PowerPC processors, SFPs, SDRAM/Flash/SRAM, AC/DC power supplies, DC/DC converters, etc.

Ellacoya Networks, Inc., Merrimack, NH – Hardware Design (12/99-11/01, 2 yrs)

ATM/POS OC-12 and OC-3 (622Mbps and 155Mbps Fiber Optic) Line Cards HW Design

Wrote HW specification for, designed and debugged a 2 port ATM/POS OC-12c line card and a 4 port ATM/POS OC-3c line card. Used PMC-Sierra PM5357 S/UNI POS-622 and PMC-Sierra PM5351 S/UNI TETRA.

ATM DS3 (44Mbps Coax) Line Card HW Design

Wrote HW specification for, designed and debugged a 6 port ATM DS3 line card. Used PMC-Sierra PM7346 S/UNI QJET and Conexant 3xLIU.

For the above designs:

Used these components: Maker MXT4400 SAR, TF Systems SONET Synchronization Unit, 1x9 optics, SRAM and SDRAM.

Implemented Altera CPLDs including Verilog coding and Altera backend tool use.

Conformance tested products against Telcordia, ANSI and ITU standards.

Other Product HW Design/Support

Helped debug/design other boards – Network timing/BITS, 10/100, Gigabit Ethernet.

Avici Systems, Inc., Billerica, MA - Hardware Design (11/97-12/99, 2 yrs)

OC-192 (10Gbps Fiber Optic) POS Line Card HW Design

Wrote HW specification for and designed a 1 port POS OC-192 (4xSTS-48c) line card. Specified parts including - optics, clock recovery, SerDes and Sonet processor (AMCC Indus). Specified Xilinx FPGA functionality.

OC-12 (622Mbps Fiber Optic) POS Line Card HW Design

Wrote HW specification for and designed a 4 port POS OC-12c line card. Specified parts including - optics, clock recovery, clock synthesis and SerDes. Specified Xilinx FPGA functionality.

OC-48 (2.5Gbps Fiber Optic) POS Line Card HW Design

Wrote HW specification for, designed and debugged a 1 port POS OC-48c line card. Specified parts including - optics, clock recovery, clock synthesis and SerDes. Specified Xilinx FPGA functionality. Conformance tested product against Bellcore, ANSI and ITU standards.

Backplane HW Design

Designed and debugged system backplane. Created schematics and oversaw layout of 2’x3’, 22 layer, .260 thick, edge plated, scalable 20 slot backplane with 10Gbps links and no vias.

Cabletron Systems, Inc., Rochester, NH - Hardware Design (6/89-11/97, 8 yrs)

ATM/SONET Product HW Design

Designed and debugged a 2 port ATM/SONET OC-12c fiber optic interface board and a 3 port OC-3c fiber optic interface board. Responsible for design including product specification through board layout and routing supervision to debug and conformance test. These products used PMC-Sierra framers.

Attended ATM Forum meetings.

ATM Switch ASIC Design

Project leader for the design of an ATM ASIC. Directed two other engineers. Responsible for architecture, documentation, coding, simulation, floor plan, static timing analysis, test generation and synthesis targeting LSI. This ASIC had several Built in Self Tests (BISTs) and had IEEE 1149.1 Boundary Scan (JTAG). First silicon had no bugs. This ASIC was part of a 5Gbps ATM switch chip set.

Ethernet Product HW Design

Designed, debugged and conformance tested several Ethernet products including single port transceiver and multi-port hub/repeater/switch products.

Other Product HW Design

Designed, debugged and/or tested other test boards and products.

Field Engineer

Solved customer problems, demonstrated products and trained customers throughout North America (1 year).

EDUCATION

BSEE, University of New Hampshire, Durham NH, 1988.

C++ course, New Hampshire Technical Institute, Concord NH, 2009.

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