Engineer Software
Resume:
Title:Network Engineer
******@***.***
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NAME: PRATUL PATEL
ADDRESS:
CITY: Lodi
STATE/PROVINCE: NJ
ZIP/POSTAL CODE: 07644
COUNTRY: USA
EMAIL: ******@***.***
PHONE: 697********
CANDIDATE ID: N/A
CITIZENSHIP: US
Citizen
EDUCATION: Not Entered
EXPERIENCE: Not Entered
WILL RELOCATE: Not Entered
RELOCATION INFO: Not Entered
JOB WANTED: Not Entered
HOMEPAGE:
HOTSKILLS:
ESUME
Pratul Patel
197- A Norwood Ave.
Lodi, NJ 07644
******@***.***
OBJECTIVE: To obtain a challenging position in the field of
Communication, where professional growth and career advancement can be
achieved by utilizing my educational background and technical skills
EDUCATION: M. S
. Electrical Engineering New Jersey Institute of
Technology,
May 1996 Major: Communication
GPA:
3.7/4.00
B. S
. Electrical Engineering University of North Carolina at
Charlotte, August 1993 Major
GPA:
3.61/4.00 Overall
GPA:
3.52/4.00
Skills: Years of experience working in Manufacturing doing research
and development work Excellent experience in Designing Digital and
Analog circuits Proficient in all aspects of designing LAN, Analyzing
Network traffic and performance Excellent designing, analyzing and
testing skills in circuits involving FPGA, Micro-controllers, Ram etc.
Excellent experience in designing FPGA using ABEL, AHDL, Altera and
Xilinx software
Languages: Java, HTML, C, C++, Assembly, Pascal, Fortran, Basic, VHDL,
and ABEL Software Tools: Spice, MATLAB, Viewlogic, Altera, Xilinx,
Mentor Graphics Operating Systems: Windows 95, Windows NT, SUN-OS/Sun
Sparc Station II & IPC, UNIX Hardware: HP Workstations, Sun
Workstations, IBM PCs and compatibles, Video Ram, Static Ram, EPROM,
ASIC, FPGA, EPLD, PLD, In circuit Programmable devices, 486 processor,
82596 LAN Processor, 82503 Dual Transceiver, WaveLAN modem, RJ45, Line
Isolation Transformer, 80C51 and PIC16C74 Micro-controllers,
Emulators, RS232, RS485, Flash, Dual Port Ram, FIFO, D/A, A/D,
Graphics Processor, LCD, Back light, Xilinx, Altera, Lattice, Power
Supply for back light control, Clock drivers, Temp. Sensor, Light
Sensor, Environment chamber, Vibration lab, Arinc 429, Tone generator
for LCD, Optical measurements, Brightness measurement, Proportional
Valve, Flow control
EXPERIENCE:
April 97
- PresentNetwork EngineerLucent Technologies,
Murray Hill, NJ Designed Circuits for QOS in Wireless and Wired
Networks Designing Hardware to implement New Protocol for Real-time
traffic on Wireless and Wired Networks Developing Protocol for Voice
and Video conferencing on existing Wireless and Wired Networks
Troubleshooting and monitoring network traffic and packets using
sniffer Designed MAC Interface for WaveLAN (802.11) and Ethernet and
IEEE 802.3 Implemented new protocol for WaveLAN Radio modem using FPGA
Designed Memory Management Unit (MMU) and Transceiver interface for
Ethernet Designed MMU to provides three way access control to incoming
and outgoing frames, for LAN Coprocessor, Transceiver and
Micro-controller Ethernet Hardware Interface with 82596 32-bit LAN
Coprocessor Designed Interface form PCMCIA to RJ45 using 82503
Transceiver FPGA design using ABEL and Xilinx software tools Designed
circuits using Transceiver, FPGA, Micro-controller, High Speed RAM,
Transformer etc.
November 96
- April97Electronics EngineerDatascope Corporation,
Paramus, NJ Research and Development / major manufacturing company
Designed Communication Interface Board Data communication using RS232
and RS485 Up to 24 address lines and 16-bit data transfer using
Micro-controller Interface with PC ISA bus using Dual Port RAM and
Flash
Evaluating NIBP modules for new product Debugged Interface Board using
Emulator
August 93
- November 96Digital Design EngineerAlliedSignal Guidance
& Control Systems, Teterboro, NJ Involved in Designing 6x8 Flat Panel
Display Unit Designed Software-Hardware Interface for the Light
Intensity Sensor Control Loop Designed digital circuit using EPLD for
controlling back light of Display Unit Evaluated and characterized
back light of Display Unit Designed Analog circuit for testing the
Graphics Processor Module Designed Algorithm for reading data form
AMLCD E-prom on power-up Designed Software-Hardware Interface for
AMLCD Tone updates Provided support for defining the memory mapped
I/Os for microprocessor Tested Graphics Processor Module Provided
support for HW/SW Integration Provided support for TV-Analog video
Integration with Graphics Processor Module Performed Optics test
including NVIS on Display Unit Provided support for demos and new win
of AH-64 6.25x6.25 AMLCD win Tested and characterized the AMLCD for
transmissivity Performed Stress Analysis for the Display Unit Trained
Technicians for testing and troubleshooting the Hardware
PROJECTS: Digital Telephony Simulation of Telephones on SUN
Workstations Interface between Computer and Analog Telephone Line
Designed Dial Tone detector and queuing circuit for multiple users
Performed On-hook/Off-hook functions for computer simulated phones
Generated Tones form binary stream using DTMF Designed to test the
software code of DMS100 at NORTHERN TELECOM LAB Neural Filter Design
Designed Controller and Neuron Cell Simulation of Neural Filter on
Computer using Altera Proved out the design by building single Neuron
Cell and controller using EPLD Tested using 26 weight states each
16-bit wide, working at 4 MHz
COURSES:
Communication Systems Analog
&
Digital Communication Random Signal Analysis Digital Signal Processing
Optimal Control Theory Linear System Theory Computer Networks Advance
Computer Systems Architecture Rapid Prototyping of Digital Circuits
Management of Telecommunications
HONORS: Reward and Recognition tied to Technical Achievement Award for
the C141 Flat Panel DU Chancellors list, fall 1992, University of
North Carolina at Charlotte Dean's List, Spring 1992 & 93, University
of North Carolina at Charlotte Member of Tau Beta Pi, National
Engineering Honor Society Member of Golden Key National Honor Society
Top 10% of the Graduating Class
1993, University of North Carolina at
Charlotte
REFERENCES: Available upon request
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