Ioannis Doudalis
*** * ********* ** ** #**** Atlanta, GA 30308
+1-404-***-**** *****@**.******.***
EDUCATION
August 2006 Present Georgia Institute of Technology, Atlanta, GA
Ph.D. Computer Science, GPA:3.86/4.0
Advisor: Milos Prvulovic
August 2009 Georgia Institute of Technology, Atlanta, GA
MS Computer Science, GPA:3.85/4.0
Advisor: Milos Prvulovic
2001 2006 National Technical University of Athens, Greece
Diploma, GPA: 8.62/10
Advisor: Nectarios Koziris
EXPERIENCE
Aug 2006 Present Graduate Research Assistant
Georgia Institute of Technology
Research Area: Hardware support for Debugging, Security
and Reliability.
May August 2009 Architecture Intern: NVIDIA
Spring 2007 Graduate Teaching Assistant
Georgia Institute of Technology
Course: Languages and Computation (Prof. Santosh Pande)
Sep 2005 July 2006 Diploma thesis: Development of an ATA over Ethernet (AoE)
server for the Linux operating system.
RESEARCH INTERESTS
Computer Architecture: Hardware Assistance for Software Debugging, System
Reliability and Security, Profilling.
Other Interests: Multi/Many Core Systems, Operating Systems, Virtualization
PUBLICATIONS
Ioannis Doudalis, James Clause, Guru Venkataramani, Milos Prvulovic,
Alessandro Orso, Effective and Efficient Memory Protection Using Dynamic
Tainting, IEEE Transactions on Computers (TC), To Appear.
Ioannis Doudalis, Milos Prvulovic, HARE: Hardware Assisted Reverse
Execution, Proceedings of the 16h International Symposium on High-Performance Computer
Architecture (HPCA 2010).
Guru Venkataramani, Ioannis Doudalis, Yan Solihin, Milos Prvulovic,
MemTracker: An Accelerator for Memory Debugging and Monitoring, ACM
Transactions on Architecture and Code Optimization (TACO), June 2009.
Guru Venkataramani, Ioannis Doudalis, Yan Solihin, and Milos Prvulovic,
FlexiTaint: A Programmable Accelerator for Dynamic Taint Propagation,
Proceedings of the 14th International Symposium on High-Performance Computer Architecture
(HPCA 2008).
James Clause, Ioannis Doudalis, Alessandro Orso, and Milos Prvulovic,
Effective Memory Protection Using Dynamic Tainting, Proceedings of the 22nd
IEEE and ACM International Conference on Automated Software Engineering (ASE 2007).
SKILLS
Programming experience: C, C++, Java, Perl, Python, Assembly, VHDL, Linux kernel
development,
Tools: SESC, Simics, SimpleScalar, Pin, LLVM
PROJECTS
Fall 2008 Present Architectural support for bi-directional debugging and reliability.
Assist the creation of memory checkpoints with the efficient use
of HW support and reduce the associated performance/memory
overheads. Performance evaluation done using SESC and Pin.
Spring 2009 Masters Project: Crafting a Reverse Execution Debugger
implemented in Pin.
Spring 2007 Architectural support for security and debugging through memory
tainting, used: SESC, Pin and LLVM.
Fall 2007 Architectural support for process scheduling.
2006 Study of the Memory Allocation Pattern of the SPEC2006
benchmark applications.
2006 Implementation of the 2Bc-gskew and Fast Path-Based Neural
branch predictors in the SimpleScalar simulator.
2006 Study of the effect of Processor frequency scaling on the Disk I/O
performance.
2005 ATA over Ethernet server developed for my diploma thesis in Linux.
2005 A parallel application implemented using MPI and OpenMP for
the course Parallel Processing Systems .
PROFESSIONAL
IEEE Computer Society Member [Since 2005]
ACM Member [Since 2006]
REFERENCES
Available upon request.