Engineer Software

Surya Vemuri

Email: *********@********.***

Address: **** ******** ******

City: Columbia

State: MD

Zip: 21046

Country: USA

Phone: 978-***-****

Skill Level: Experienced

Salary Range: $120,000

Willing to Relocate

Primary Skills/Experience:

See Resume

Educational Background:

See Resume

Job History / Details:

Surya N Vemuri

9037 Constant Course

Columbia, MD - 21046

Phone: (978) 290 - 0348 email:*********@********.***

SUMMARY

* Effective individual contributor and technical lead with 14 years of embedded software development experience

* Experienced in developing Carrier Ethernet Services

* Expertise in the area of layer 2 Switching, MEF E-LINE and E-LAN concepts

* Adept at working on Converged Packet-Optical Transport products

* Technical Expertise in layer3 Protocols - IP/MPLS and Pseudo-wires

* Proficient in the development of high availability features

* Extensive experience in design and development of Call Control, Signaling and Routing protocols

* Strong Contributor to Protocol/Control Plane

* Focused on meeting customer expectations and producing high-quality software

* Proficient in Object Oriented Design and multi threaded programming

* Strong C++/C programming skills

TECHNICAL SKILLS

Protocols: 802.1Q Bridging, Vlans, STP(802.1d), RSTP(802.1w), IGMP Snooping,

802.3ad Link Aggregation, Ethernet OAM (802.3ah, 802.1ag, Y.1731, E-LMI) MPLS, LDP, Pseudo-wires, OSPF, TCP/IP,

PPP, ARP, ATM (UNI, PNNI, ILMI, Q.2931, PNNI), FR (FRF.5/8, LMI),

SS7, R1, Digital R2, SNMP and SQL

Languages: C, C++, Assembly (Intel x86).

Operating Systems: RTOS (VxWorks, pSOS, Linux, proprietary OS), UNIX, Windows, OSE

Debugging & Environment Tools: gdb, multi, Code Emulators, ADTECH, Spirent,

Smart bits, Clear Case, Clear Quest, Perforce

Education:

M.Tech (Computer Science & Engineering), I.I.T Chennai (India),

B.Tech (Computer Science & Engineering), KLCE Vijayawada (India),

PROFESSIONAL EXPERIENCE

Lead Engineer - Ciena Corporation Linthicum MD 2009-Present

* Designed and developed enhancements to Service-Photonic Layer inter-op on Ciena`s OME 6500 to enhance the adjacency discovery and auto-provisioning to introduce Optical Protection Switch (OPS) Card in various Optical protection configurations.

* Led development effort in enhancing RSTP to provide sub-second convergence in CN4200 packet optical ring topology.

* Coordinated development to enhance the MAC learning to support Egress MAC learning completely in data plane (NPU)

* Acted as Technical prime in solving customer network issues related to Packet

Optical Layer-2 services, proposed hitless MAC bridging during upgrades in Packet Optical ring topology to meet Customer requirements

* Led development effort in delivering OSPF solution to resolve major customer network reachability issues with OSPF stack incompatibility. Provided technical lead for the Customer driven release.

* Designed and developed Delay Measurement feature for 4x10G OTR card in OME 6500 platform using Cortina T41 API Interface.

Lead Engineer - Ciena Corporation, Acton MA 2006- 2009

Carrier Ethernet Services and Protocols

* Acted as a key member in defining and architecting the Object Model to support 802.1Q Bridging on Ciena`s Multi Service Switches and in extending the Bridging object model to Packet Optical transport product (CN4200)

* Designed and developed scalable multicast frame work for bridging services using Aricent`s code base

* Involved in refining bridging functional requirements based on PLM and Customer inputs for Packet Optical transport switches.

* Led the effort in delivering the MAC learning and distribution in Control Plane for bridging

o Designed and developed State machines to handle MAC learning and distribution between different Subsystem components

o Enhanced MAC learning to support learning on LAG ports

o Implemented Make-Before-Break to handle multicast member compaction

* Architected, designed and implemented Nodal Ethernet Manager to manage the bridging functionality with multi-level object distribution using Object servers.

* Designed and developed Dry-Martini Pseudo-wires on Ciena`s Multi Service Switches, integrated Dry Martini PWs into Multi-Segment Pseudo-wires with third party code (DCL)

* Provided technical guidance to inter-continental team in product development on Call Control, MPLS features and in fixing the critical customer issues

Senior Software Engineer - Ciena Corporation, Acton MA 2004-2006

Pseudo-wires and Call Control features

* Designed and developed Multi-Segment Pseudo-wires

o enhanced VCCV functionality for MS-PWs

o Implemented PW Status propagation on Multi-Segment PWs

* Designed and Developed static/LDP based Management Pseudo-wires

o Implemented INET interface to handle VLAN tagging for the slow path Ethernet frames received on Ethernet Management Pseudo-wires.

* Responsible for design and implementation of sub logical ports on Ethernet interfaces to support switching, IP forwarding and bridging at VLAN level.

o Expanded the concept to ATM and FR to support IPoATM and IPoFR

* Designed and implemented ATM/Ethernet service Interworking with Bridge MUX SPVCs

* Worked closely with SQA to resolve outstanding issues from Customers on time

Software Engineer - Lucent Technologies, Westford MA 2001 - 2004

Worked on ATM/FR/IP modules of the Multi service switches

* Involved in complete development life cycle of 2 ATM cards

* Led a team of 3 in developing the Call Control and routing software on next generation Line Card. The effort involves defining requirements, design, development and porting of virtual circuit manager for 128K virtual connections.

* Responsible for design and development of ATM Test Access Functionality (ATAF) to monitor a virtual connection(PVC/SVC/Soft PVC)

* Enhanced Virtual Network Navigator (OSPF) functionality to support OC-48c line Cards. Performed memory and performance analysis requirements for OC-48c VCMGR.

* Redesigned pacing of keep alive mechanism for 128K Circuits.

* Designed and developed FR/ATM network inter-working over PNNI based networks.

* Redesigned Point-to-Multipoint Soft-PVCs to make scalable on Multi Service switches

* Designed and developed Pseudo Call generation (PCG) tool to support capacity and stress testing

* Fault Tolerant PVC support across multiple OSPF areas

* Provided enhancements and fixed critical customer bugs in virtual circuit manager and virtual network navigator components.

Aricent (formerly known as Hughes Software Systems) - Delhi India 1997 - 2001

Technical Lead - Aricent 2000 - 2001

High availability on next generation Burst Code Channel Demodulator (BCD)

* Designed and developed redundancy functionality on Control Cards.

* Designed Memory mapped architecture to manage BCDs over cPCI bus.

* Lead a team of 5 in delivering the complete functionality on Control Card

Senior Software Engineer - Aricent 1998 - 2000

Signaling - SS7/ ISUP Interface

* Involved in design and implementation of SS7 ISUP interface to support the Call Control mechanism (involves handling the Call Setup and Call Clear Messages),

* Provided an interface to support SSP initiated and Channel Unit Initiated continuity tests (COT).

* Involved in on-site integration of SS7-ISUP software in Customer network.

Software Engineer - Aricent 1997 -- 1998

Signaling Protocols Development

* Enhanced Digital R2 signaling protocol to support non-Q.421 standard including different call clear control modes (such as Forward re-answer support),

* Involved in adding new register signals for Caller ID feature, and line signals like Re-release support.

* Supported Customer trails and the deployment phase

* Implemented Router functionality on Channel Units to provide communication between high speed digital Interface(T1/E1) card and NMS

* Implemented heart beat mechanism Channel Units and digital Interface for monitoring and detecting failures

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