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Project Manager Engineer

Location:
Pittsburgh, PA
Posted:
January 05, 2013

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Resume:

ERIKO NURVITADHI

*** * ********* **. *** ***, Pittsburgh, PA 15213

Phone: 541-***-****. Email: abp8ip@r.postjobfree.com

Web Page: http://www.ece.cmu.edu/~enurvita

R ESEARCH INTERESTS

Computer Architecture - Hardware-based Emulation, Checkpointing, Transactional Memory, Fault-Tolerant Architectures

Mobile Computing - Fast Handoff Schemes, Low-power Video Decoding Techniques, Multimedia-Capable Networks

E DUCATION

Carnegie Mellon University Pittsburgh, PA

Ph.D. Electrical and Computer Engineering (August 2004 Present) GPA: 4.00/4.00

o Advisor: Prof. James Hoe

Oregon State University Corvallis, OR

M.S. Electrical and Computer Engineering with minor in Computer Science (June 2004) GPA: 4.00/4.00

o Advisor: Prof. Ben Lee; Thesis: Adaptive Semi-Soft Handoff for Cellular IP Networks

M.B.A. Master of Business Administration (June 2004) GPA: 3.82/4.00

o Business Plan: iTrainer A Personal Trainer at the Palm of Your Hand

B.A. International Studies with minor in Business (June 2003) GPA: 3.77/4.00, Magna Cum Laude

o Thesis: Trends in Mobile Computing: A Study of Mobile Phone Usage in the United States and Japan

B.S. Computer Science (January 2002) GPA: 3.77/4.00, Magna Cum Laude

B.S. Computer Engineering (June 2001) GPA: 3.77/4.00, Magna Cum Laude

B.S. Electrical and Electronic Engineering (June 2001) GPA: 3.77/4.00, Magna Cum Laude

E XPERIENCE

Computer Architecture Lab at Carnegie Mellon Graduate Assistant, Pittsbugh, PA (July 2004 Present)

Work on Total Reliability Using Scalable Servers (TRUSS), especially in developing a functional IA32 CPU model for emulation.

Also involved in ongoing investigation on hardware support for checkpointing.

Intel Mircoprocessor Research Labs Graduate Research Assistant, Hillsboro, OR (June 2003 June 2004)

Worked with Dr. Shih-Lien Lu on the development of real-time FPGA-based cache emulators, and workload characterization

studies utilizing the emulators.

Oregon State University Graduate Assistant, Corvallis, OR (September 2001 June 2003)

Involved in research with Prof. Ben Lee in wireless campus networks and low-power video processing. Taught lab sessions and

graded assignments for senior/graduate classes, Microprocessor System Design and Network Security.

Mentor Graphics High Level Synthesis Intern, Willsonville, OR (July 2001 September 2001)

Developed and debugged VHDL test cases for Mentor Graphics synthesis tool (Leonardo Spectrum).

Camo Software Engineer Intern, Corvallis, OR (April 2001 June 2001)

Composed a master documentation for Camo s stastical database software product.

Sun Microsystems Product Engineer Intern, March 2000 September 2000

Developed programs in Perl and SQL, analyzed test data, wrote documentations, and performed hardware testing. All activities

are in the context of testing and manufacturing of Sun s E10000 servers done on-site at Sun s Beaverton branch.

Oregon State University (Webworks) Web assistant, Corvallis, OR (January 1999 March 2000)

Created and maintained web sites for Oregon State University.

P ROJECTS (REFERENCES ARE TO THE RELEVANT PAPERS LISTED IN THE PUBLICATIONS SECTION)

A Functional IA32 Processor Core [5] (August 2004 Present)

Develop a functional IA32 processor core in HDL (i.e. VHDL, BlueSpec) to be used as the CPU model for TRUSS [1]

prototype. Bochs IA32 software emulator is used as behavioral reference. Xilinx ISE and ChipScope are used for synthesis and

debugging. Current version of the core runs several simple user-level applications (e.g. Dhrystone) on Virtex2Pro FPGA.

Hardware Support for Checkpointing [3] (September 2004 Present)

Explore architectural designs and requirements for checkpointing memory states to allow for a long window of speculation with

multiple outstanding checkpoints. Such support can potentially be useful for various application areas, such as transactional

memory, very aggressive speculation schemes, reliability, and debugging. RSIM, Simics, and Flexus software simulators have

been used for evaluation at different phases of the project.

RESUME OF ERIKO NURVITADHI PAGE 2 OF 3

FPGA-based Cache Emulation and Workload Characterization [4,6,10,11,15] (July 2003 July 2004)

Worked on FPGA-based cache emulation at Intel MRL under the guidance of Dr. Shih-Lien Lu. Two emulators were

developed: (1) PHA$E, which sits on a system bus of a real system host, collects memory traces, and performs L3 cache

modeling in real-time. (2) ACE, which injects delays to the system in addition to collecting traces, effectively modeling the

latencies of the experimental L3 cache being emulated, as experienced by its time dilated real system host. These emulators were

used to conduct various workload characterization studies. See reference publications for details.

Fast and Efficient Handoff for Cellular IP Network [2,8] (January 2002 June 2004)

Devised a new handoff scheme for Cellular IP network that reduces both latency and traffic compared with the handoff

schemes originally proposed for Cellular IP. NS2 software simulator were used for evaluation.

Low Power Video Decoding Using Dynamic Voltage Scaling [7,12] (January 2002 December 2003)

Investigated dynamic voltage scaling techniques for low-power video decoding. Simplescalar and Wattch software simulator

were used as the evaluation framework.

A mobile phone survey in US and Japan [9,14] (April 2002 December 2002)

Conducted a survey about mobile phone usage among university students in US and Japan. 315 respondents participated from 8

universities in urban and rural areas in US and Japan (Portland, Corvallis, Tokyo, Ehime, Okinawa).

Multimedia-Capable Campus Network (August 2001 March 2002)

Explored ways to create multimedia-capable campus network by means of Cellular IP and multimedia proxies. The project was

selected as a finalist of the national research contest held by Intel (http://www.intel.com/research/awards/).

Online Project Manager (Senior Design Project, September 2000 May 2001)

Led a team of four in the design and development of an information-based system that can manage engineering projects online.

The system was built on MS SQL server on Windows 2000 utilizing ASP, HTML, SQL and JavaScript.

Web administration tool (June 2000 August 2000)

Created a CGI program using Perl and SQL to administer users in a proprietary web-based tool for Sun Microsystems, Inc.

Implemented functionalities such as adding, modifying and showing user profile.

JavaBeavs Screen Saver (January 2000 May 2000)

Developed a screensaver program using Java (Visual J++) that shows graphics and texts promoting Oregon State University.

The team won the 3rd place in the 1st OSU ACM annual software contest.

P UBLICATIONS (SEE HTTP://WWW.ECE.CMU.EDU/~ENURVITA TO DOWNLOAD PUBLISHED PAPERS)

Published Work

1. B. T. Gold, J. Kim, J. C. Smolens, E. S. Chung, V. Liaskovitis, E. Nurvitadhi, B. Falsafi, J. C. Hoe, and A. G. Nowatzyk, TRUSS: A

Reliable, Scalable Server Architecture, To appear in IEEE Micro Special Issue on Reliability-Aware Microarchitectures, November-

December 2005

2. E. Nurvitadhi, B. Lee, C. Yu, and M. Kim, "Adaptive Semi-Soft Handoff for Cellular IP Networks," International Journal of

Wireless and Mobile Computing (IJWMC), Special Issue on "Media Streaming Over Wireless and Mobile Networks", 4th Quarter, 2005

3. J. Kim, E. Nurvitadhi, and E. Chung, "Opportunity of Hardware-Based Optimistic Concurrency in OLTP," Technical Report

CMU-CS-05-138, pg 7-16, 2005

4. E. Nurvitadhi, N. Chalainanont, and S. L. Lu, "Characterization of Private and Shared L3 Cache Behavior of SpecJappServer

and TPC-C," International Conference on Supercomputing (ICS), 2005

5. E. Nurvitadhi and J. C. Hoe, "Full-System Architectural Exploration Sandbox," Workshop on Architecture Research using FPGA

Platforms (WARFP), 2005 Extended Abstract

6. S. L. Lu, E. Nurvitadhi, J. Hong and S. Larsen, "Memory Subsystem Performance Evaluation with FPGA based Emulators,"

Workshop on Architecture Research using FPGA Platforms (WARFP), 2005 Extended Abstract

7. B. Lee, E. Nurvitadhi, R. Dixit, C. Yu, and M. Kim, "Dynamic Voltage Scaling Techniques for power efficient Video Coding,"

Journal of Systems Architecture (JSA), April 2005

E. Nurvitadhi, Adaptive Semi-Soft Handoff for Cellular IP Networks, a thesis for M.S in Electrical and Computer

8.

Engineering, Oregon State University, July, 2004

9. E. Nurvitadhi, A Study of Mobile Phone Usage in the United States and Japan: An International Undergraduate Research

Experience, To appear in the World Congress on Engineering and Technology Education, March 2004

RESUME OF ERIKO NURVITADHI PAGE 3 OF 3

10. N. Chalainanont, E. Nurvitadhi, K. Chow, and S. L. Lu, Characterization of L3 Cache Behavior of Java Application Server,

Seventh Workshop on Computer Architecture Evaluation using Commercial Workloads, February 2004

11. N. Chalainanont, E. Nurvitadhi, R. Morrison, L. Su, K. Chow, S. L. Lu, and K. Lai, Real-time L3 Cache Simulations Using the

Programmable Hardware-Assisted Cache Emulator (PHA$E), Sixth Annual Workshop on Workload Characterization, October

27, 2003

12. E. Nurvitadhi, B. Lee, C. Yu, and M. Kim, A Comparative Study of Dynamic Voltage Scaling Techniques for Low-

Power Video Decoding, International Conference on Embedded Systems and Applications, June 23-26, 2003

13. E. Nurvitadhi, W. Leung, and C. Cook, Do Class Comments Aid Java Program Understanding? Frontiers In Education

Conference, November 5-8, 2003

14. E. Nurvitadhi, Trends in Mobile Computing: A Study of Mobile Phone Usage in the United States and Japan, a

thesis for B.A in International Studies, Oregon State University, October, 2002

Under Review

15. J. Hong, E. Nurvitadhi, and S. L. Lu, Design, Implementation, and Verification of Active Cache Emulator (ACE), submitted

for publication at the International Symposium on Field-Programmable Gate Arrays (FPGA), February, 2006

S KILLS

Programming Languages: VHDL, BlueSpec, C, C++, Java, HTML, ASP, SQL, Perl, PHP, JavaScript, and Cold Fusion

Engineering Tools/Simulators: Xilinx ISE, ChipScope ModelSim, Bochs, Simics, Simplescalar, Wattch, RSIM, and NS2

Spoken Languages: Bahasa Indonesia, Japanese, and Malay

H ONORS AND ACTIVITIES

Scholarships/Fellowships/Grants

CMU ECE Fellowship (tuition and stipend, 2004 Present)

Supplemental Oregon Laurels Fellowship (partial tuition, 2002 2003)

International Undergraduate Research Program Grant ($1000 for mobile phone survey in Japan, 2002)

Scholastic Teaching Assistant Scholarship (tuition and stipend, 2001-2002)

Intel Undergraduate Research Contest Grant ($1440 for multimedia-capable campus network project, 2001)

Rexwell D. Miller Scholarship (partial tuition, 2000 2001)

McDaniel Scholarship (partial tuition, 1999 2000)

Accolades

Best talk on the Graduate Student Conference 2002 (ECE session)

Intel Undergraduate Research Contest Finalist

Waldo Cummings Award 2001 Honoree

3rd Place for OSU ACM 1st Annual Software Contest

OSU Honor Rolls

Highschool Student with High Achievement in Sports Award

6% highest in Indonesia (Distinction) on 1996 International Mathematics Competition held by The University of New South

Wales

Extracurricular

Director of Technology for the MBA Association at OSU (2003 2004)

Webmaster for the Golden Key International Honour Society at OSU (2001 2003)

Honor Societies

Golden Key, Phi Eta Sigma, Alpha Lambda Delta, Tau Beta Pi, Eta Kappa Nu, and Phi Kappa Phi

Organizations

IEEE, ACM, and MENSA



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