Resume

Computer Engineer

Location:

Houghton, MI

Posted:

December 10, 2012

Contact this candidate

Resume:

CURRICULUM VITAE

September, ****

Brian T. Davis

Assistant Professor abp6el@r.postjobfree.com

Michigan Tech Cell: 906-***-****

**** ******** **. - *** **** Home: 906-***-****

Houghton, MI 49931 www.btdavis.org

http://www.linkedin.com/in/briantdavis

Academic Background

2001 Ph.D. Computer Science & Engineering, University of Michigan - Ann Arbor,

Dissertation title: Modern DRAM Architectures

1994 M.S.E. Computer Science & Engineering, University of Michigan - Ann Arbor,

Areas of Emphasis: Digital Arithmetic and Hardware Description Languages

1991 B.S.E.E. Electrical Engineering, Michigan Technological University,

Magna Cum Laude, Computer Option, Thematic: Psychology

Research Interests

Exploitation of non-uniform DRAM access latency for performance & power optimization

Design of DRAM access control mechanisms in hardware and software

Design and evaluation of usable aerospace and avionics microprocessor based systems

Hardware description languages for prototyping and reconfigurable computing

Incorporating sensing and microprocessors in novel applications

Academic, Teaching & Professional Experience

2006 - current Assistant Professor, School of Technology - Electrical Engineering

Technology; Computer & Network Admin, Michigan Tech, Houghton MI

2001 - 2006 Assistant Professor, Department of Electrical & Computer Engineering,

Michigan Tech, Houghton MI

1998 - 2000 Graduate Student Research Assistant, Advanced Computer Architecture Lab,

University of Michigan, Ann Arbor MI

1997-1998 Adjunct Professor, Department of Computer Science, Willamette University,

Salem OR

1997 Visiting Lecturer, Department of Electrical Engineering, University of

Toledo, Toledo OH

1994 - 1997 Graduate Student Research Assistant, Advanced Computer Architecture Lab,

University of Michigan, Ann Arbor MI

1986 - 1994 Recurring employment with General Motors, both direct and as a contract

employee, responsibilities including CAD station operator for plant layout,

anthropomorphic test device (crash-test dummy) calibration, onboard data

acquisition instrumentation programming, and powertrain control module

programming.

Brian T. Davis September 29, 2010 1

Professional Skills

Commercial Pilot

Single & Multi-Engine Land; Instrument Airplane; High-Performance

In excess of 1000 hours PIC & 200 hours instrument

Computer Programming

C/C++, Java, Perl, COBOL, Pascal, LabVIEW, MATLAB, SQL, Python,

Lisp, Assembly(many), more.

Computer Hardware Design

Cadence, Mentor Graphics, Verilog, VHDL, Altera Quartus II, Altera Nios,

Xilinx ISE, Eagle, more.

Instruction

iClicker, Blackboard, WebCT, Respondus, Peer Instruction, more.

Professional Honors

Michigan Tech Distinguished Teaching Award winner, 2004-2005 Academic Year

Finalist for the Michigan Tech Distinguished Teaching Award, Michigan Tech

Academy of Teaching Excellence, academic years ending 2003 & 2005.

ECE Departmental Professor of the year 2002-2003

Presented by Eta Kappa Nu student honor fraternity

2002 NSF CAREER Award.

1994 GLCTTR (Great Lakes Center for Truck & Transit Research) Scholar

Professional Memberships & Service

Member of ACM

Special Interest Group on Computer Architecture (SIGARCH)

Special Interest Group on Simulation and Modeling (SIGSIM)

Reviewer for PACT (Parallel Architectures and Compilation Techniques)

Session Chair for SCOPES05 Conference

Member of IEEE

IEEE Computer Society

Advisor to Michigan Tech IEEE Computer Society student chapter

Reviewer for IEEE Transactions for Embedded Systems

Reviewer for MICRO-38

Member of ASEE

Member of Tau Beta Pi

Brian T. Davis September 29, 2010 2

External Consulting

Efficient Memory Technology

Policies for DRAM access stream performance optimization through bank parallelism.

Interpower

Instrumentation and control systems for inductive heating in forging equipment

Moore Controls

Design and maintenance of network infrastructure

Kinetic Design Services

Specification and assembly of specialized computer workstations and hardware

Optimized Consulting Solutions

Identification of consulting opportunities, data-acquisition and microcontroller systems

Aerophysics, Inc.

Proposal preparation for federal aerospace research opportunities

Research Contracts

Unisys, Implementation of a DDR2 Controller using FPGA technology.

Brian T. Davis (PI), $3300, 8/26/02 - 5/9/03

Xilinx, Donation of ISE/Foundation Software for Senior Design,

Brian T Davis (PI), $2495, 10/15/02

NSF Award, REU: Research Experience for Undergraduates.

Brian T. Davis (PI), $18,120, 7/01/02 - 6/30/10.

NSF Award # CCR-0133777, CAREER: Memory Controller Interconnect and

Policy Determination. Brian T. Davis (PI), $442,385, 7/01/02 - 6/30/10.

Micron, Hardware Implementation of a DRAM Controller.

Brian T. Davis (PI), $5000, 8/01/01 - 4/30/02

Gifts

Arcelor Mittal, Donation of workstation, software, PLC and associated equipment

for reheat furnace scale model & vision tracking project

Brian T. Davis (PI), Approximately $4000, 10/01/2008.

Altera, Donation of DE2 development board for Academic Use

Brian T. Davis (PI), $995, 4/28/2005

IEEE Computer Society, Equipment Grant for CSIDC Competition,

Brian T. Davis (PI), $802, 11/02/2001.

Brian T. Davis September 29, 2010 3

Selected Publications

Refereed Journals

1. Vinodh Cuppu, Bruce Jacob, Brian Davis, Trevor Mudge. High-Performance DRAMs in

Workstation Environments. IEEE Transactions on Computers, November 2001. Volume

50, Number 11, pp. 1133-1153.

Citations: ~29

Refereed Conference Publications and Proceedings

2. Brian Davis, Use of Classroom Response Systems in Numerically Intensive Courses,

Canadian Engineering Education Association Conference, 2010. June 7-9, 2010, Queen s

University Kingston, ON, Canada.

3. Ying Xu, Aabhas Agarwal, Brian T. Davis, Prediction in Dynamic SDRAM Controller

Policies, In Proceedings of the 9th international Workshop on Embedded Computer

Systems: Architectures, Modeling, and Simulation (Samos, Greece, July 20 - 23, 2009).

Lecture Notes In Computer Science, vol. 5657. pp. 128-138.

Acceptance rate: 34.6%

4. Jun Shao, Brian T. Davis, A Burst Scheduling Access Reordering Mechanism,

Proceedings of the 13th International Symposium on High-Performance Computer

Architecture (HPCA-13), February 10-14, 2007, Phoenix, Arizona. pp. 285-294.

Acceptance rate: 16%

Citations: ~28

5. Jun Shao, Brian T. Davis, The Bit-reversal SDRAM Address Mapping, Proceedings of

the 9th International Workshop on Software and Compilers for Embedded Systems

(SCOPES05), Sept. 29, 2005 - Oct. 1, 2005. pp. 62-71.

Citations: ~8

6. Ying Zheng, Brian Davis, Matt Jordan. Performance Evaluation of Exclusive Cache

Hierarchies. International Symposium on Performance Analysis of Systems and Software,

Austin Texas March 10-12, 2004. pp. 89-96.

Acceptance rate: 35.3%

Citations: ~6

7. Brian Davis, Trevor Mudge, Bruce Jacob, and Vinodh Cuppu. DDR2 and Low-Latency

Variants. Proceedings of the Solving the Memory Wall Workshop, held in conjunction

with the 27th International Symposium on Computer Architecture (ISCA-2000). Vancouver

BC, Canada, June 2000.

Citations: ~23

8. Vinodh Cuppu, Bruce Jacob, Brian T. Davis and Trevor Mudge, A Performance

Comparison of Contemporary DRAM Architectures, International Symposium on

Computer Architecture, Atlanta Georgia, May 2-4 1999, pp.222-233.

Citations: ~140

9. Brian T. Davis, et.al., Impact of MCM s on High Performance Processors,

EEP-Vol. 19-1, Advances in Electronic Packaging - 1997 Conference, Volume 1,

ASME 1997, pp.863-868.

Citations: ~ 2

10. Brian T. Davis and Trevor Mudge, A Verilog Preprocessor for Representing Datapath

Components, 4th International Verilog HDL Conference, March 1995, pp.90-98.

Citations: ~5

Brian T. Davis September 29, 2010 4

Invited publications

11. B. Davis, T. Mudge, and B. Jacob. The New DRAM Interfaces: SDRAM,RDRAM and

Variants . In High Performance Computing, M. Valero, K. Joe, M. Kitsuregawa, and H.

Tanaka, Editors, Vol. 1940 of Lecture Notes In Computer Science, Springer Publishing,

Tokyo, Japan, 2000. pp. 26-31.

Reports

12. Brian T. Davis Modern DRAM Architectures, University of Michigan, Ph.D Thesis.

Citations: ~23

13. Brian T. Davis and Paul Green, "Benefits of Sound for Driving Simulation: An Experimental

Evaluation", University of Michigan Technical Report UMTRI-95-16, August 1995.

Papers Submitted, and in Review

14. Aabhas Agarwal, Daniel Basset, Rongrong Lai, Brian T. Davis, Virtual Page Placement

Guided by DRAM Locality and Latency,

Submitted to ISMM 2010, Rejected, Acceptance Rate 19.1%

Being revised for re-submission

15. Divyakant.Gupta, Brian T.Davis and Kurt Pregitzer. Web-Based Wireless Environment

Sensing Network, Submitted to IEEE Transactions on Instrumentation and Measurement

May 27, 2005.

Brian T. Davis September 29, 2010 5

Selected Graduate Students

Ph.D Students

Jun Shao, Reducing Main Memory Access Latency through SDRAM Address

Mapping Techniques and Access Reordering Mechanisms

defended 10/30/06, Placed with Comtrol Corporation, Minneapolis, MN.

RongRong Lai, Coursework masters, enroute to Ph.D. Left Ph.D program to work

at Microsoft, Redmond, WA. Ph.D uncompleted.

Ying Zheng (M.S.E.E) Exclusive Cache Architecture and Performance

Evaluation. defended 5/5/03, Placed with Intel, Shanghai.

Started Ph.D program, left without completion due to U.S. Visa difficulties

Masters Students

Dan Bassett (M.S.E.E) Modifying Page Allocation in the Linux 2.6 Kernel to

Increase Bank Parallelism defended 4/24/2008,

Continuing graduate studies at San Jose State University.

Tom Stout (M.S.E.E) Implementation of a Wireless Environmental Sensor

Network defended 12/14/07, Placed with Plexus Corp in Raleigh, NC

Jing Zhao (M.S.E.E) Implementation of Prediction in Dynamic SDRAM

Controller Policies defended 10/11/07,

Placed with Cummins in Columbus, IN.

Ying Xu (M.S.E.E) Prediction in Dynamic SDRAM Controller Policies

defended 4/3/06, Placed with Motorola in Libertyville, IL

Gaurav Kulkarni, Coursework M.S.E.E. graduation date April 2008.

Placed with Microline Technology Corporation, Traverse City MI.

Srinivas Singampalli (M.S.E.E) Multi Bus LAN simulation using Rational

Unified Process, defended 11/14/05.

Divya Kant Gupta (M.S.E.E.) Web-Based Wireless Environmental Monitoring

System, defended 4/26/05.

David Pelster (M.S.E.E) A Coursework Path Encompassing the Study of

Computer Architecture within the Parallel Architecture Design Space.

defended 4/21/05, Placed with Intel, Folsom, CA.

Ali Pezeshk (M.S.E.E) Design and Implementation of a 3D Computer Game

Controller Using Inertial MEMS Sensors.

defended 12/07/04, Placed with Bosch, then Microsoft.

Rade Trimceski (M.S.E.E) Bluetooth Enabled Ad-Hoc Networks: Performance

evaluation of a Self-Healing Scatternet Formation Protocol.

defended 8/23/04, Placed with Microsoft, Redmond, WA.

Shih-Ying Chou (M.S.E) Embedded Linux Web Server defended 12/10/03

Karttikeya Shah (M.S.E.E) Design and Simulation of a Phased Locked Loop:

Analog Circuit Design using Cadence. defended 8/20/03,

Placed with Maxim Electronics

Brian T. Davis September 29, 2010 6

Undergraduate Projects Advised

As an engineer who enjoys tinkering, modifying and building hardware, I have frequently been

approached to advise projects both formally and informally. Below are some of the projects for

which I was the formal advisor. A complete list of all projects includes more than those below.

Vertical axis wind-turbine - charge controller and load controller implementation.