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Electrical

Location:
Savoy, IL
Posted:
October 09, 2012

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Resume:

Seung-Moon Yoo

*** ***** ****, *****, ** *****. 217-***-****

Office: 408 C&SRL, 1308 W. Main St., Urbana, IL 61801. 217-***-****

E-mail: aboqye@r.postjobfree.com

WWW: http://www.icims.csl.uiuc.edu/~smyoo

/

Education

University of Illinois at Urbana-Champaign, Urbana, IL

Department of Electrical and Computer Engineering

Thesis Advisors: Prof. Sung-Mo (Steve) Kang, Prof. Josep Torrellas

Ph. D. student in Electrical and Computer Engineering, Aug. 1996 -- present

Kyung-pook National University, Taegu, Korea

Department of Electronic Engineering

M. S. degree in Electronic Engineering, Feb. 1989

B. S. degree in Electronic Engineering, Feb. 1987

Work Experience

Research Assistant, Coordinated Science Laboratory

University of Illinois at Urbana-Champaign (Feb. 1996 -- present)

Conducting researches on 'Low power low Vdd circuit design techniques' with Prof. Sung-Mo(Steve) Kang

High speed dynamic logic

No-race charge recycling logic

Sub-1V circuit techniques

Conducting researches on 'SOC(System-On-Chip

)'

Research Assistant, Digital Computer Laboratory

University of Illinois at Urbana-Champaign (Sep. 1998 -- present)

Conducting researches on PIM(Processor-In-Memory) architecture with Prof. Josep Torrellas

Processor architecture including memory hierarchy structure for FlexRAM

High performance DRAM architecture

Performance evaluation

Chip implementation

Circuit designer, Senior Engineer

DRAM circuit design team, Samsung Electronics (Feb. 1989 -- Aug. 1996)

Desinging DRAM circuits and Developing DRAM devices

(256kb, 4M, 256M & 1Gb DRAMs)

Skills

Chip design : HSPICE, Cadence, Synopsis, and Mentor

Programming: C

Systems: Unix, MS-DOS, Windows 95, Windows NT

Awards and Honors

1st prize in Samsung semiconductor technical paper contest (1995)

Technique grand award of Samsung group for the contribution to the development of the 256Mb DRAM(1994)

3rd prize in Samsung semiconductor technical paper contest (1990)

Publications

14 U.S. patents filed and several Korea/U.S. patents pending

US5892386 : Internal power control circuit for a semiconductor device

US5889719 : Semiconductor memory device

US5845108 : Semiconductor memory device using asynchorous signal

US5808955 : Integrated circuit memory devices including sub-word line drivers and related methods

US5744997 : Substrate bias voltage controlling circuit in semiconductor memory device

US5771198 : Source voltage generating circuit in semiconductor memory

US5703811 : Data output buffer circuit of semiconductor memory device

US5668497 : Direct-current voltage generating circuit intermittently activated for reducing electric power consumption

US5654930 : Semiconductor memory device having low power self refresh and burn-in functions

US5636171 : Semiconductor memory device having low power self refresh and burn-in functions

US5629894 : Memory module having read-modify-write function

US5610869 : Semiconductor memory device

US5592119 : Half power supply voltage generating circuit for a semiconductor device

US5446697 : Semiconductor memory devic



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