Matthai Philipose

January ****

ATTN: Matthai Philipose 99/2807

aboqvd@r.postjobfree.com

One Microsoft Way

http://research.microsoft.com/en-us/people/

matthaip Redmond, WA 98052

phone: 425-***-****

Citizen of India, US Permanent Resident

Research Activity recognition systems, perception algorithms, technology for elder care,

depth-augmented

Interests vision, web-scale model extraction, statistical reasoning, artificial

intelligence

Education Ph.D

., Computer Science and Engineering, 2005

\Automatic Staged Compilation"

Adviser: Dr. Craig Chambers

University of Washington,

Seattle, WA

M.S

., Computer Science and Engineering, 1996

University of Washington,

Seattle, WA

B.S

., Computer Science, 1994

Cornell University,

Ithaca, NY

Experience

Researcher

Microsoft Research

Mobile Computing Research Center

Sep 2011 { present

Developing algorithms and systems for mobile computing, using phone-based sensors

(especially

cameras) to understand the phone's user better.

Project Lead Intel Labs

Everyday Sensing and Perception

Jan 2008 { Nov 2010

Project co-lead on the Everyday Sensing and Perception (ESP) project, setting technical

di-

rection for a team of twelve researchers and engineers. ESP developed sensors,

algorithms,

systems and usages to \understand 90% of your life with 90% accuracy", focusing on high-

datarate sensors (RGB and 3-D video). Key results include online semi-supervised learning

algorithms for enhanced perception, signal-processing techniques for de-noising 3-D

video, a

state-of-the art real-time face recognition system, 3-D/RGB algorithms for recognizing

han-

dled objects and related daily activities, a projector-camera system (Bonfire) for

augmenting

interactions with notebooks, a vision-based system (Classmate Assist) for tutoring

kindergart-

ners in manipulation-based math tasks, and infrastructure for low-latency power-e cient

vision.

Yielded over a dozen top academic publications and joint product development with three

Intel

business units.

Project Lead Intel Research

Technology for Long-Term Care

Sep 2006 { Dec 2008

Project lead on the Technology for Long-Term Care (TLC) project, leading a team of ten

researchers and engineers. TLC was a technology-hardening and deployment effort aimed at

demonstrating the utility of automated human activity recognition technologies to care

givers

for the elderly. TLC was a joint project between Intel Research, Intel's Digital Health

busi-

ness group, the University of Washington, the US Department of Veterans Affairs,

Providence

Washington, Elderhealth Northwest and Swedish Home Care. Developed use cases for sensor-

based technologies for care, recruited collaborators including lead customers and

business group,

secured funding, recruited team members, led system specification, design,

implementation, in-

tellectual property harvesting and evaluation. Resulted in an offer for a nationwide

validation

deployment from the VA, accepted by Intel's Digital Health business unit. Strongly

influenced

the design of Digital Health's sensor-based monitoring technology.

Project Lead Intel Research

Human Activity Recognition Jul 2002 { Aug 2006

Project lead on the Human Activity Recognition (HAR) project, leading a team of four

Ph.D.-

level researchers and two support engineers. Led research resulting in the development of

Radio

Frequency Identification (RFID)-based sensors, large-scale common sense mining and

reasoning

techniques, and anomaly detection techniques. Led the production of a suite of sensors,

software

and prototype applications centered around large-scale human activity recognition. Led

the

transfer of HAR infrastructure to business groups within Intel and to outside entities.

Developed

a technology demonstration shown to U.S. Congress, the National Governor's Association

and

at a variety of other academic, industrial and press venues.

Research Assistant

University of Washington

Dynamic Compilation Group

Seattle, WA

1995

{ 2002

Developed techniques to enable very fast optimization of programs at run time, i.e.,

dynamic

compilation. Designed, implemented and evaluated prototype dynamic compilation systems.

Wrote or modified several compiler pipelines during the course of this work. Some of the

work

involved extensive modification of a commercial-quality compiler for wide machines, the

Multi-

flow compiler.

Summer Intern

Hewlett Packard Laboratories

Compiler & Architecture Research Group

Palo Alto, CA

Supervisor

: Dr. Scott Mahlke Summer 1996

Extended the Elcor optimizing compiler (a research compiler for the Intel/HP EPIC

architecture)

to identify and prepare novel kinds of regions for predication and scheduling. Produced a

detailed

report documenting the technique and changes to the compiler framework. This work has

become

part of the Trimaran compiler infrastructure release.

Teaching Assistant

University of WashingtonDepartment of Computer Science & Engg.

Seattle, WA

1994

{ 1996

Lectured, graded and held o ce hours for a mid-level programming language class taught by

Professor Craig Chambers. Graded and held o ce hours for an introduction to programming

class tought by professors Martin Tompa and Larry Ruzzo (two quarters).

Technical Staff

Cornell University

Cornell Theory Center

Ithaca, NY

Supervisor

: Dr. Adolfy Hoisie 1992 { 1994

Measured the impact of various system characteristics (e.g. bandwidth, latency, process

cre-

ation and synchronization overheads) of the KSR and SP-1 supercomputers on Theory Center

workloads. Worked with two computer scientists and two physicists on

parallelizingcorning, a

large quantum-mechanics simulation in FORTRAN from Corning, Inc.

Honors 2010OLCV-10 Best Paper Award: 4th IEEE Online Learning for Computer Vision Work-

shop, \Online Semi-Supervised Perception: Real-Time Learning without Explicit Feedback",

2010

2005

ISWC-05 Best Paper Award: International Symposium on Wearable Compters, \Fine-

Grained Activity Recognition by Aggregating Abstract Object Usage", 2005.

2004ACM SIGPLAN Best of

PLDI:

\An Evaluation of Staged Run-Time Optimizations in

DyC" was selected as one of the 50 most influential papers of the last 20 years in

theProgramming

Language Design and Implementationconference.

1994 Douglas Whitney prize for writing in engineering, Cornell Unversity

1990

-94Cornell University Foreign Student Scholarship, Cornell University

Service Program committee member for IJCAI 2009, Pervasive 2009, LoCA 2009, AAAI Fall

Symposium

2009, AAAI 2008, Conference on Supporting Technology and Design for Healthy Aging 2008

Keynotes NIPS Workshop on Machine Learning for Assistive Technologies, Whistler, 2010

Conference on Supporting Technology and Design for Health Aging, Seattle, 2007

Workshop on Intelligent Systems for Assisted Cognition, Rochester, NY, 2007

National Academic of Engineering Frontiers of Engineering, Niskayuna, NY, 2006

Refereed Jour

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