Engineer Design

ENRIQUE P REZ DE LAS HERAS

. NATIONALITY: Spanish.

. PHONE: +34-650******

. COUNTRY: Spain.

. CITY: Torrej n de Ardoz

. PROVINCE: Madrid.

. E-MAIL: **.**********@*****.***

. WEBSITE: https://sites.google.com/site/quiquespace/

. LINKED IN PROFILE: http://es.linkedin.com/pub/enrique-perez-de-las-

heras/50/2a7/89b

EDUCATION

Major Institution Period

International Master Escuela Superior de Ingenieros 2009/2011

degree in Analog/Digital Industriales (Madrid)

Design.

Bachelor Degree in Universidad de Alcal de Henares, 2002/2003

Electronic Engineering (Madrid) 2005/2006

Skills Electronic Engineering:

http://www.uah.es/estudios/grados/planes.asp?cd=203&plan=37

Skills of the Master degree:

- Simulation, design and assembling of DC-DD converters: Flyback, Push-

Pull, Half Bridge...

- Electromagnetic compatibility studies in the electronic systems.

- Wireless Sensor Networks (WSN). ZigBee protocol. Research work about

the 6Lowpan protocol.

- Biomedical Engineering. Research work about the heart desfibrilator .

- Working principle and analysis of the three phases power transformers

and induction generators.

- Power electronic studies: Power amplifies, linear power supplies,

IGBTs, Tiristor, Triac, Buck converter, Boost converter, Buck-Boost,

ac-dc converters, ac-ac converters...

- Electronic tools. Real characteristics of the electronic components,

intrinsic noise in the amplification, passive and active

transducers...

- VHDL design with ISE tools of XILINX. Doing the simulations with the

same tool and checking its properly working downloading the *.bit in

the FPGA.

- Digital Filter Design with MATLAB. Checking the digital filters in a

FPGA.

- Embedded microprocessors in FPGAs (MicroBlaze and PowerPC) with the

XILINX EDK tool.

Master Thesis

It was made in English and I went to the University of Dresden (Germany)

to do it. It was a real time signal processing of the echoes provided by

ultrasound arrays using a National Instruments system made up of a 4-

channels ADC and one of the most powerful FPGAs available in the market

currently. LabVIEW and MATLAB were the main developing tools used.

PATENT

. A Broadband Tester for Alcatel-Lucent Company (Final project of the

Electronic Engineering).

The "Verificador de Cableado de Banda Ancha" (VCBA) for the Alcatel-Lucent

company was a device which solves the interconnections errors in the ADSL

systems. The VCBA receives commands from a personal computer (PC) using a

USB cable. These commands were processed by a PIC controller which switched

the ports and sent several signals to the ADSL system under test .And in

this way it was possible to detect interconnections and synchronism errors.

I was the only person who made this project from the beginning to the end.

I had to design the electronic schematics, routing the PCBs using the ORCAD

software, programming the PICs controller and the PC software which manage

the hardware in C and Visual Basic 6.0.

I achieved the maximum mark and this project was registered in the

spanish patents register. And furthermore, nowadays the VCBA is used by

Alcatel-Lucent and other companies to test and solve errors in ADSL

systems.

GRANTS AND AWARDS

. Best academic record in the Electronic Engineering (2006/200707).

. Recommendation letter of Eduardo de la Torre (Master Degree Professor,

Escuela de Industriales de Madrid).

. Recommendation letter of Juan Manuel lvaro Villagr n (Indra Sistemas,

S.A).

. Recommendation letter J rgen Czarske (Professor of TU Dresden).

ADITIONAL QUALIFICATIONS

Curses Place

FPGAs Xilinx-VHDL-ISE Universidad Aut noma, Madrid

Xilinx EDK: MicroBlaze and Universidad Aut noma, Madrid

PowerPC

C++ CYBERDRIVE school, Torrej n de Ardoz (Madrid)

Operator of Radioactive Infocitec, Madrid

Instalations

Radioactive facility Infocitec (Madrid)

operator + C.S.N.

License

Quality Management Femxa (http://www.cursosfemxa.es)

OS, Software, programming Description Level

languages, etc (High - Medium -

Low)

Windows OS All versions High

Linux OS Ubuntu High

ORCAD Electronic circuit design High

PCAD Electronic circuit design High

PSPICE Circuit Simulation High

SIMetrix/SIMPLIS Circuit Simulation High

MATLAB Mathematic SW High

VISUAL BASIC Developing tool High

LABWINDOWS CVI Developing tooll High

LABVIEW Developing tool High

MPLAB Developing tool High

AUTOCAD Design Program High

PHOTOSHOP Photo SW Medium

DREAMWEAVER Developing Medium

MICROSOFT OFFICE Word, Excel, Acces... High

ORACLE Data Base Medium

Xilinx EDK MICROBLAZE and PICOBLAZE High

ISE Xilinx Developing tool High

MODELSIM Simulation tool for FPGAs High

ASIC - High

SoC - High

RTL - High

Arduino - High

LEONARDO Synthesis to for FPGA High

C in PIC's y uP - High

C++ - High

Assembly Language - High

VHDL y VERILOG - High

HTML, JAVA - Medium

Zigbee - High

. Others: B Drive License.

. Personal Security Clearance.

WORK EXPERIENCE

Company Position Assignments Period

ELECTRO Quality Quality certifications according to the 15/02/2012

MEDICAL Testing general standard for medical equipment - Nowadays

COMPANY Engineer IEC60601-1 and their collateral and

particular standards: IEC 60601-X and IEC

60601-2-X.

Testing X Ray devices to verify the

properly working according to the

standards

Dielectric strength test, insulation

tests, irradiation tests, etc.

Chek Lists, test reports, quality

documentation...

INDRA Developme Maintenance and development of RF systems 30/07/2007

Systems nt Design of tester devices to detect errors -

Engineer in the 23/03/2011

alert system of military aircrafts.

Programming FPGA (VHDL) and PIC (C and

Assembler) using ISE XILINX and MPLAB.

Digital Integrated design and Functional

simulation (Modelsim and XILINX ISE)

Test Benchs and chipscope for the VHDL

programs.

Synthesis and Place and Route of the VHDL

designs.

ASIC design simulation and verification.

RTL Design, development and verification.

SoC.

Layout Synthesis, Floor planning, Place

and Route.

DSP and DFT implementation using a VIRTEX5

FPGA

for a Jammer Signal device.

Ethernet protocol implemented in a VIRTEX2

FPGA

using Microblaze (XILINX ISE).

RS232, BUS1553 and USB protocols in a

SPARTAN3e

and VIRTEX2.

Encrypting algorithm DES in a SPARTAN3.

Graphical interface for Windows OS using

Visual Basic 6.0 LabWindows CVI and

LABView.

PIC 18xxxx, 24xxxx and 32xxxx ( MPLAB.

uP 8086 and 68000 ( C++ (cross compiler

running under

Linux)

Networks server maintenance.

Project Management and documentation.

LANGUAJES

. English: level C1.

. Learning German.

Contact this candidate