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Engineer Technician

Location:
Woodinville, WA
Posted:
November 07, 2012

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Resume:

Bruce Sherry

***** *.*. ***** ******

Woodinville, WA 98072

abo9yt@r.postjobfree.com

206-***-****

425-***-****

Capabilities:

Debug.

Processor and System Architecture.

PLD and FPGA (Xilinx & Altera) design in Palasm, Abel, Ahdl & VHDL.

ECL and TTL Logic Design.

Programming in C, Assembly, and Microcode.

Test Equipment Design.

Test Procedures.

Training.

Documentation.

Experience:

5-07 to present Strobe Data, Inc. Redmond, WA

3-02 to present Bruce Sherry Designs, Woodinville, WA

Design, software, production, and sales of a Battery Instrumentation system for Electric Vehicles,

now in the third generation.

Consultant to AMKA LLC. / Strobe Data Inc. Redmond, WA. Three small projects involving

measuring humidity with Atmel microcontrollers. I performed all engineering, hardware, software,

and PC layout. Hardware Architecture, and microcontroller firmware for the StrobeMux USB 16 port

serial to USB adapter. Currently involved in Software for peripheral emulations for Strobe s Kestrel

series of HP1000 minicomputer replacements.

Consultant to Headwaters Management Systems, Pettigrew, AR. Hardware design and production

of several parking meter add-on products.

6-98 to 2-02 XKL LLC. Redmond, WA

Group Engineer. Responsible for design of XRT-2 Mesh Interface (internal communication

network), Power system, and Backplane design projects. 4Gb board to board communication links.

CutThru Memory. All designs simulated to the PC board level on Modelsim and synthesized with

Synplicity. Wrote testbenches for all other modules in XRT2 project. Also responsible for Twanger

II backplane/memory tester, and various debug bits.

10-95 to 6-98 Strobe Data, Inc. Redmond, WA

Hardware Engineer. Responsible for architecture and design of PCI hosted Osprey TXP PDP-11

computing system. Archictecture, design and initial microcode of i486 based PDP-11 Unibus and

Qbus adapters for Osprey TXP.

6-92 to 10-95 XKL Systems, Inc. Redmond, WA

Group Engineer. Responsible for architecture and design of XNI 4 port ethernet interface to the

XKL TOAD-1 computer system. Wrote microcode diagnostics to bring up XNI' and debug memory

s

and backplane of TOAD-1. Made major contributions in the debug of all parts of the TOAD-1

system.

4-88 to 6-92 Access Associates, Inc. Santa Clara, CA

Director of Engineering. Responsible for all engineering designs. Projects for Intel and Stream

Computers. Manager of corporate MIS system.

Conversion from IBM PC-Lan to Novell Netware for corporate network.

Consultant to cisco Systems, Inc. for 33 months, full time. Duties performed: Documentation,

Diagnostics development, hardware debug, microcode debug, technician training, microcode

maintainance and upgrade (HSCI). While at cisco, I created the initial hardware architecture of

their "Silicon Switch Engine" for which a US Patent has been issued.

11-79 to 4-88 Britton Lee, Inc. Los Gatos, CA

Group Engineer. System and Processor Architect, leader of design team for BL-8000 system (a

10MIP Risc processor, or 32MIP multiprocessor). Architect for 300 series products. Redesign of

IBM Block-Multiplexer interface for IDM-500 series. Design of ECL Database-Accelerator, and

Memory system for IDM-500.

10-77 to 11-79 Amend, Bradford, Sherry Santa Clara, CA

Partner, Project engineer for IBM 370-303X Memory Card Tester. Design of Memory Test Pattern

Generators for all Memory Card and System Testers. Debug of all Memory System Testers for IBM

370-138, 145, 148, 158, 3031, 3032, 3033 for National Semiconductor Memory Systems.

8-77 to 10-77 Digital Microsystems Oakland, CA

Engineer. Responsible for PC layout of power supply. Assembly and debug of 8" floppy drive

systems for microcomputers and Z80 based microcomputer systems.

9-75 to 8-77 Santa Clara Systems, Inc. Santa Clara, CA

Engineer. Design of Test pattern generator for 501 series Memory System Testers. Project

Engineer for Model 18 and 21 Storage Card Testers. Debug of Models 20 (370-158) and 23 (370-

168) Memory System Testers for Intel Memory Systems.

6-73 to 9-75 Intel Corporation Santa Clara CA

Lead Tester Maintenance Technician. Principal maintenance technician for all Macrodata MD-150,

154 test systems. Maintenance for all final-test test systems at Santa Clara 2 facility.

3-72 to 6-75 Tally Corporation Kent WA.

Factory Repair Technician. Repair of mechanical and photo-electric paper tape readers. Repair of

dot matrix printers.

Education:

06-07 University of Washington Extension. Embedded & Real Time Systems Programming.

91 Mission College Santa Clara, CA

Pre-Calculus Algebra and Trig, Calculus 1, 2, & 3.

83 U.C. Berkeley Extension Santa Clara, CA

Computer Architecture.

12-71 CTC Education Systems Lynnwood WA.

Electronics Technician with Color TV and digital electronics. First Class FCC Radio Telephone

Operators License earned.

6-70 Graduate Lincoln High School, Seattle, WA.

Inactive Instrument rated Private Pilot with 300+ hours.

References available on request.



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