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Software Engineer Design

Location:
Austin, TX
Posted:
November 06, 2012

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Resume:

Technical Architect Resume

Title

Technical Architect

Primary Skills

Ruby on Rails, Java, C++, C#

Location

US-TX-Austin

Posted

Jul-04-12

RESUME DETAILS

Objective

Seeking a leadership role in software product development, leveraging my background in algorithms and my experience encompassing several domains including electronic design automation, data mining, machine learning, distributed processing, web-based and mobile application development.

Skills

• Certified Scrum Master.

• Ruby on Rails, C#, J2EE, .NET, C++, JAVA, JavaScript, JQuery, BackBone.js, PERL, TCL/TK, CUDA, OpenCL, Objective-C, SQL

• Google Android, Linux, Unix

• Logical and Physical VLSI Design Automation tools, frameworks and related languages.

• Data Mining, Machine Learning. WEKA, MATLAB

• Concurrent and Distributed Programming.

• Mobile and Web Applications.

• Eclipse, Visual Studio, NetBeans, GIT, SVN, Test, Behavior and Domain Driven Development (TDD, BDD, DDD). Most of my recent applications have adopted the Onion Architecture approach.

• Technology Stack independent development style, generic programming, design patterns. Ability to pick the best of breed technologies that optimizes the project requirements. I have extensive experience using Ruby on Rails, .NET MVC3, LAMP and J2EE software stacks.

Experience

Software Development Manager/Solutions Architect at Advanced Micro Devices 2009 - Present

• Currently leading a distributed software development team (Malaysia, India, Austin) involved in development and support of a large portfolio of cross-functional and multi-disciplinary custom software applications. The domains span object oriented content management systems, content distribution portals and Product Data Management (PDM) tools.

• Role includes technical, personnel management and mentoring of the team.

• Requirements analysis of feature requests from multiple business units.

• Technical architecture and functional requirements.

• Backlog prioritization, resource assignment, project planning and release management.

• The Software development process follows the AGILE framework. I am also a Certified ScrumMaster.

Technical Architect (Independent

Contractor) at Aditazz, Inc. April 2011 - Present

• Conceived, designed and implemented a Ruby on Rails application in the Building Information Modeling Systems (BIMS) domain serving the Hospital Construction industry.

Principal Software Engineer at Pyxis Technologies, Inc. 2005 - 2009

• Innovative application of data mining and machine learning techniques for predicting semiconductor yield of the current layout-under-consideration.

• Architect and implementer of a concurrent and distributed analysis tool for detecting design for manufacturing (DFM) defects in post-layout IC designs.

• Architect and implementer of a post-layout correction tool that produced an IC layout optimized for manufacturing.

• Added several features to the core detailed and global router to ensure that the routes produced are correct-by-construction from the manufacturing point of view. This involved enhancing the core path-search algorithms to incorporate manufacturing-awareness in the cost functions.

Principal MTS at Magma Design Automation, Inc. 1998 -- 2005

• Implemented a fast Aerial-Image Lithography simulator for Lithography analysis during placement and routing, producing manufacturing friendly physical layouts.

• Implemented a distributed version of Magma's physical synthesis product FixCell.

• Co-architected and implemented Magma's virtual prototyping/floor-planning solution BlastPlanPro from Magma.

• Previously chief architect of Moscape, Inc. acquired by Magma in 2000. Architected the integration of the Moscape and Magma data models.

• Managed 7 full-time senior software engineers.

• Architected and implemented Moscape's flagship product CircuitScope. This tool was capable of performing full chip transistor level circuit and coupling analysis and detecting failures due to signal integrity issues.

Senior Software Engineer at Oracle Corp. 1996 - 1998

• Responsible for the design and implementation of corporate wide circuit analysis tools for detecting signal integrity issues.

Senior Software Engineer at Synopsys Corp. 1993 - 1996

• Architected and implemented a CAD framework for integrating the Hspice circuit simulator into third party EDA vendor's frameworks such as Mentor Falcon and Cadence DFII.

• Co-developer of the AvanWaves (MetaWaves) waveform display tool.

Senior Software Engineer at Digital Equipment Corp. 1991 - 1993

• Co-developer of the PowerFrame Object-Oriented CAD Framework.

Senior Software Engineer at Mentor Graphics Corp. 1989 - 1991

• Co-developer of the object-oriented software foundation for SCS's CAD framework.

Senior Software Engineer at Integrated Device Technologies, Inc. 1987 - 1989

• Implemented the back-end physical design Placement and Routing flow for IDT's microprocessor design environment.

Patents and Publications

US Patent 6,591,402, granted July 8, 2003; System and method for performing assertion-based analysis of circuit designs.

US Patent 6,449,753, granted September 9, 2002, Hierarchical Coupling Noise Analysis for submicron integrated circuit designs.

TSV Stress-aware Full-chip Mechanical Reliability Analysis and Optimization for 3D IC, Design Automation Conference, 2011

A Fast Simulation Framework for full-chip thermo-mechanical reliability analysis of Through Silicon Via based 3D ICs, ECTC, 2011

RADAR: RET-aware Detailed Routing using fast Lithography simulations, Design Automation Conference, 2005.

Coupling noise analysis for VLSI and ULSI circuits, International Symposium for Quality Electronic Design, 2000.

Contributed a book chapter to the upcoming publication of A Handbook of Physical Design Algorithms, CRC Press, 2007, (ISBN: 084*******)

Education

PHD candidate, Electrical and Computer Engineering, expected 2012

Research Focus: Advanced 3D IC design automation algorithms.

University of Texas, Austin, TX

M.S., Electrical & Computer Engineering, 2003

University of California, Santa Cruz, CA

B.S., Electrical Engineering, 1985

Arizona State University, Tempe, AZ

B.S., Physics, 1983

University of Bombay, Mumbai, India

Certifications

Scrum Master

B.S. Physics

B.S. Computer Engineering

M.S. Computer Engineering

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