Samuel Siewert
***.*******@********.***
University of Colorado, Department of Electrical and Computer Engineering, Campus Box 425
Boulder, Colorado 80309-0425, Cell: 303-***-****
OBJECTIVE
Teaching, Research, and Service in Multi-Core Embedded and Cyber-physical Systems: SoC
design,
computer architecture and simulation, robotics and machine vision, cyber-physical
systems, storage and
networking, scalable IO fabrics and clustering, solid-state storage and NVM, GP-GPU/GPU
co-processing,
virtual machine environments, digital video, HPC systems, security/encryption, data
protection and RAID.
EDUCATION
2000 PhD Computer Science University of Colorado, Boulder
1993 MS Computer Science University of Colorado, Boulder
1991 28 Credit Hours, Computer System Design Engineering University of Houston, Clear
Lake
1989 BS Aerospace and Mechanical Engineering University of Notre Dame
1985 7.5 Credit Hours, Early Admission, Physics/Philosophy University of California,
Berkeley
RESEARCH AND DEVELOPMENT EXPERIENCE
2011-presentUniversity of Colorado Computer Engineering, Sr. Instructional Faculty
Expansion of Embedded Systems Certification curriculum and labs
Assistance with Capstone Design for Electrical, Computer and Energy Engineering
Computer Vision and Robotics Hardware and Software development
2010-2011Intel Corp. Intel Architecture Group
Transaction level and cycle accurate SoC simulations for performance projection pre-
Silicon
Application of Erasure Codes for Cloud Storage and Beyond RAID research
High efficiency server I/O subsystem design and verification using SystemC
2006-2010Atrato Inc. CTO (Principal System Architect)
? Architect for Linux application/kernel, C, algorithms, and system architecture
development.
? Lead design for Hybrid flash Solid State Disk and HDD RAID array, IO profiler and
intelligent
block manager demonstrated 1.8 million I/Os/sec from 240 terabyte sub-rack design.
? Architected and Implemented Terabyte/Petabyte, Gigabit Scale SAN/NAS Virtualization
Engine.
? Designed, built, and delivered cluster file system configuration with 240TB N+1 high
availability
storage SAN (4G fiber channel) and 10GE LAN NAS services for gigE/10G clients using
IBRIX.
? Designed algorithms, implemented, and tested for RAID-1/10, RAID-5/50, RAID-6/60 and
logical
volume management with fault detection, isolation, and recovery for fail-in-place array
design.
? Firmware/software customization of gigabit fiber channel and SAS/SATA expanders and
controllers.
? Development of SCSI tasking software and integration of Linux drivers for SAN
transport.
2002-2006Emulex CorporationPrincipal Engineer, firmware architect
? Architect for embedded firmware, X-Scale/ARM, C, assembly, for joint Emulex/Intel ASIC.
? GA by Intel and Emulex as successful product - assisted with key architecture
decisions.
? Modeled performance for 4x4G fiber channel, 8 lane SAS/SATA ASIC firmware architecture.
? Development of Fiber Channel, SAS error handling firmware for Emulex/Intel Sunrise Lake
ASIC.
? Development of performance measurement and profiling applications for XScale and ARM.
? R&D to develop performance firmware on custom Tensillica SoC (System on a Chip).
2001-2002Network Photonics Member Technical Staff, lead developer
? Embedded Linux, C, Prototype 96 channel OC-192 (10Gbps) MEMS DWDM controller.
? PowerPC, VxWorks BSP, C, assembly, boot and driver code for three custom boards.
? Design, code and test of boot, driver, and application for OC-48/OC-192 DWDM network
element.
? Responsible for PowerPC 8xx transponder firmware and assisted with PowerPC 82xx control
systems software; development of VxWorks BSP software for the PPC 8xx and 82xx,
integration
and debug of the TFFS (True Flash Filesystem), RAM filesystem and firewire (IEEE 1394a).
? Embedded Linux: Design, implementation, tuning and test of DWDM MEMS controller
application.
2000Lucent Technologies Corporation Member Technical Staff
? Design, implementation and test of real-time fiber optic network element controller
software.
1997-2000Ball Aerospace Corp. Senior Engineer, lead designer
? PowerPC, VxWorks, C for U. of Arizona, Jet Propulsion Lab and Ball Aerospace Joint
Project
? Spitzer Space Telescope Instrumentation Software Architect for MIPS
? Launched by NASA and in operation since August 2003
? MIPS (Multi-band Imager and Photometer for SIRTF) instrument real-time
firmware/software lead.
? Provided configuration and control of two separate detector/mechanism control and
signal
processing FPGA state machines for sky scan mosaics, super-resolution, and data
compression.
Software flown on Spitzer telescope, launched in August 2003
(http://www.spitzer.caltech.edu/).
? Evaluated performance of the VxWorks RTOS on a VME RAD6000 single board computer for
IR&D.
1993-1997NASA JPL, CU Space Grant CollegeResearch Asst., lead designer
? Solaris and Linux, C/C++, and embedded C/RTOS for U. of Colorado, NASA JPL Joint
Project
? Hitch-hiker payload Flown on Space Shuttle (STS-85)
? Technology Demonstration of AI automation successfully met research goals
? Co-investigator for real-time automation experiments and development of a Space Shuttle
payload
End-to-End Mission Operations Software System, flown summer 1997 on STS-85.
? Principal architect of distributed ground control system and embedded flight systems
software.
? Demonstrated secure Web Operations at U. of Colorado, JPL, and Goddard Spaceflight
Center.
? Responsible for software development management, proposal preparation, GRA/URA training
and
hiring, integrated hardware/software testing with NASA and regular reporting of results.
1989-1992McDonnell Douglas Space Systems Engineer Specialist
? Solaris, C/C++, Ada Development at NASA Johnson Space Center for McDonnell Douglas
? Mission Certification of Ascent/Entry MCC Real-Time Software
? Assisted with mission adoption of software by GPO (Guidance and Procedures Officer)
? Developed and installed real-time, mission certified software in Shuttle Mission
Control Center.
? Formal presentations and demonstrations to NASA safety and Mission Operations
Directorate.
? Developed and demonstrated orbit/entry simulation executive for Aero-assist Flight
Experiment.
? Space Station models team - implemented geomagnetic field and space radiation models.
1988Lockheed Missiles and Space Co. Summer Engineering Intern
? Analyzed/evaluated models for atmospheric and thermal environment during launch ascent.
1987AT&T Switching EngineeringSummer Engineering Intern
? Analyzed/evaluated forecasts and upgrades for 5ESS digital switching systems.
CONSULTING EXPERIENCE
2011-presentTrellis-Logic LLC Founder, Senior Consultant
? Cloud scalable and Mobile embedded research and development
? Real-time high definition color transformation SDK for Atom, NVIDIA, Windows, Linux
? UAS (Unmanned Aerial Systems) integrated HD digital video and GIS performance
? Intel/Amplidata Models for Data Durability (Recovery) for RAID and Advanced Erasure
Codes
2009EnableTV Senior Software Architect
? Architecture for Solid-state Scalable Ad-insertion Emulator, Linux and C/C++
2007 Solekai Systems Senior Software Architect
? Delivered Head-end Test System for Open Cable, Linux and C/C++
? Designed, developed MPEG2 video services, conditional access, PSI data, and open cable
apps.
2004-presentStudio-B for IBM, Intel Author, Technical Article Series
? Writing Cloud-Computing for Education Series Articles for IBM
? Infrastructure Architecture Essentials Series Articles for IBM
? Big Iron Lessons and SoC Drawer Series for IBM
? Articles on Nehalem-Tylersburg, SSE, VTune, and optimizing Digital Media Apps for Intel
1997-1998iCrossing/Newgate Internet Consultant, Software Developer
? Developed concept for scalable, parallel processing, intelligent, content-based search
engine.
1993-1996Teledesic CorporationConsultant, RT Mission Operations
? Bill Gates / Craig McCaw Global Telecomm/Datacomm Venture
? Developed constellation operation automation strategies presented to a NASA JPL.
PATENTS AND INVENTIONS
2009 US Filing 12/364,271 Systems and Methods for Block-Level Management of Tiered
Storage.
2009 US Filing 12/395,529 Systems and Methods for Detection, Isolation, and Recovery of
Faults.
2009 US Prov. Filing 61/ 233,579 Scalable Virtualization Controller for Solid-State
Storage (VxSSD).
2008 US Filing 12/395,509 Storage System Front End - Transport Protocol Agnostic Driver
design.
2008 US Pat. 7,370,326, granted May 6 - Prerequisite-based scheduler.
GRANTS AWARDED
2011 Intel Embedded Systems Research and Education Grant for University of Colorado,
Boulder
2007 Qualcomm Inc. Grant for Embedded Cert. Program Lab Equipment Upgrades (Co-Awarded)
2003 University of Colorado, Engineering Excellence Fund Grant for ECEN 4623/5623
1994 University of Colorado Graduate School Dean's Small Grant Award, Ph.D. research
HONORS AND AWARDS
2006 Mensa International Member (#100134555)
2000 Tau Beta Pi National Engineering Honor Society Life member
1998 NASA Group Achievement Award Tech. Demonstration flown on STS-85
1994 University of Colorado UGGS Teaching Assistant Award
1991 McDonnell Douglas Astronautics, Houston Division Achievement Award
1985 NASA Space Shuttle Student Involvement Program Regional Winner and National Finalist
1985 National Merit Scholarship Corp. Scholarship Finalist
1984 California Scholarship Federation Life Member
1984 Accelerated Student Program/Early Admission University of California, Berkeley
DEVELOPMENT SKILL SUMMARY
Processor Experience Intel x86 32/64 bit, Atom SoC, ARM Coretex, TI OMAP/DM, XSC,
MIPS64, PPC,
Cell BBE, Xilinx/Atera FPGA, Stellarton Atom/Altera Hybrid, Quadro FX GPU, and Tesla GP-
GPU.
SoC Design SystemC/TLM, Cycle-accurate C++ simulation, ISS and device emulators, RTL
correlation.
HPC OpenCL/OpenGL, CUDA, OpenMP, Linux clusters, Tesla/Fermi GP-GPU, 10G/40G networks.
Linux kernel, driver, applications, embedded (ELDK, Wind River), real-time, digital
media, video.
C/C++ and Assembly 20+ years embedded, driver, kernel, and application experience.
RTOS Workbench/VxWorks/Linux, ThreadX, Nucleus, ?-COS, and custom embedded executives.
Python, Web, GUI SOAP/XML/WSDL, Python JTAG debugger GUI, X-windows real-time GUI.
Test tools FC, SAS, SATA, gigE/10GE, PCI-e, MPEG and logic analyzers, data integrity,
real-time.
Protocols gigE, 10GE, TCP/UDP/IP, TOE, MPEG2,4, Infiniband, iSCSI, Fiber Channel,
SAS/SATA, OC-
192, QAM256, video transport, Cisco DOCSIS gateway.
EDA and HDL Cycle accurate C++ performance simulation tools, SystemC (OSCI and
Synopsis), Mentor
Graphics and Altium schematic capture and PCB design tools, Altera and Xilinx FPGA design
tools.TEACHING AND ADVISING EXPERIENCE
2011-presentU. of Colorado, Electrical and Computer Engineering Sr. Instructional
Faculty
ECEN 5623/4623, Real-Time Embedded Systems Fall 2011
ECEN 5840, Graduate Design Independent Study (Ultrasound Venous flow rates) Fall 2011
ECEN 5840, Graduate Design Independent Study (Linux HD Video for ARM Coretex) Fall 2011
2000 2011 U. of Colorado, Electrical and Computer Engineering Professor Adjunct
ECEN 5623/4623, Real-Time Embedded Systems Fall/Spring 2000-07, Fall 08-10, Summer 02,
03, 08
ECEN 5653, Real-Time Digital Media Spring 2010, 2011
ECEN 5033, Real-Time Digital Media and Robotics Spring 2008, Spring 2009
ECEN 5840/41, Indep. Study Real-Time Audio/Video
Summer 2006, Fall 2006
ECEN 8990, Doctoral Thesis Advising Fall/Spring 2004-05
ECEN 5840, Indep. Study, Real-Time Sensor Fusion Fall 2003
1996 1999 U. of Colorado, Computer Science/Aerospace Engineering Graduate Instructor
ASEN 4519, Embedded Real-Time Systems Software Fall 1997, Spring 1999
CSCI 3753, Operating Systems Recitation/Lab
Spring 1996
RESEARCH PROJECTS
2011 present U. of Colorado, Computer Engineering Sr. Instructional Faculty
? Development of design co-simulation tools for robotics and computer vision real-time
applications.
2000 2011 U. of Colorado, Computer Engineering Professor Adjunct
? Distance Learning and Labs project for optics and robotics.
? Computer Vision application-based evaluation of Linux 2.6.18 kernel.
? Storage Area Networking performance measurement research to extract workload
characteristics.
? MORPHED Real-time combined computer vision and data glove processing of ASL.
1992 2000 University of Colorado, Graduate Research Ph.D. Student
? Real-time Execution Performance Agent, Ph.D. thesis, Dr. Gary Nutt advisor
? Distributed Automation Technology Advancement Shuttle STS-85 Hitchhiker payload
? A Common Core Language Design for Layered Extension, M.S. thesis, Dr. Ben Zorn advisor
? Artificial Neural Network and DSP kernel-based cancerous cell detection Smart
microscope
RESEARCH VISITS AND COLLABORATION
2011 Intel Innovation Council, Data Protection Advanced Development
2009 Invite to the Advanced Computing Systems Workshop 2009, Annapolis Maryland.
1997 Univ. of Arizona Steward Observatory, Spitzer Space Telescope Instrumentation, Dr.
George Rieke
1994 NASA Jet Propulsion Lab, Artificial Intelligence Group, Dr. Dennis Decoste
PROFESSIONAL SERVICE AWARDS AND AFFILIATIONS
2012 Treasurer of RAS Chapter for IEEE Denver Region 5
2011 Chair of RAS (Robotics and Automation) Chapter for IEEE Denver Region 5
2010 Founder and Chair of RAS (Robotics and Automation) Chapter for IEEE Denver Region 5
2008 Senior member of Institute of Electrical and Electronics Engineers (#41272120)
2006 Member of Storage Networking Industry Association IOTTA TWG, SMIS TWG
2000 Co-founder of University of Colorado Electrical Engineering Embedded Certification
Program
1997 Senior member of American Institute of Aeronautics and Astronautics (#032578)
MAJOR FUNDING CONTRACTS
2012 Development of Real-Time High Definition Video Color Transformation OEM Solutions
[$250K/year]
2012 Phase-II Unmanned Aerial Systems Digital Video and Graphics Analysis [$130K/6
months]
2012 Advanced Erasure Code Models and Data Recovery Analysis [TBD]
2011 Phase-I Unmanned Aerial Systems Digital Video and Graphics Analysis [$35K]
2011 Proof-of-Concept for Real-Time High Definition Video Color Transformation
[$60K/year]
TEXTBOOK PUBLICATIONS
2006 S. Siewert, Real-time Embedded Components and Systems, Charles River Media / Thomson
Delmar Learning, ISBN 158*******.
JOURNAL PUBLICATIONS
R&D PUBLICATIONS
1) S. Siewert, Cloud-based Education, Part 3: Cloud-based robotics for education, IBM
developerWorks, February 2012.
2) S. Siewert, Cloud-based education, Part 2: Tapping Cloud-based High Performance
Computing
for Education, IBM developerWorks, January 2012.
3) S. Siewert, Cloud-based education, Part 1: E-learning strategy for instructors, IBM
developerWorks, December 2011.
4) S. Siewert, Using Intelr VTune Performance Analyzer and Intelr Performance
Primitives for
Real-time Media Optimization, Intel Corporation, June 2009.
5) S. Siewert, Using SSE and IPP to Accelerate Image Processing Algorithms, Intel
Corporation,
August 2009.
6) S. Siewert, Infrastructure architecture essentials, Part 7: High-performance
computing off the
shelf, IBM developerWorks, December 2008.
7) S. Siewert, Infrastructure architecture essentials, Part 5: Content delivery and
distribution
network design, IBM developerWorks, November 2008.
8) S. Siewert, Infrastructure architecture essentials, Part 4: Scalable enterprise
systems
management, IBM developerWorks, October 2008.
9) S. Siewert, Infrastructure architecture essentials, Part 3: System design methods for
scaling,
IBM developerWorks, October 2008.
10) S. Siewert, Infrastructure architecture essentials, Part 2: Find, avoid, and
eliminate system
bottlenecks, IBM developerWorks, October 2008.
11) S. Siewert, Architecting a grid from components, IBM developerWorks, September
2007.
12) S. Siewert, SoC drawer: The Cell Broadband Engine chip: High-speed offload for the
masses,
IBM developerWorks, April 2007.
13) S. Siewert, SoC drawer: Opportunities and challenges for SoC designs serving the
digital
content revolution, IBM developerWorks, Jan 2007.