Signal Processing Control
Resume:
*****@*****.***
Antal Soos, PhD Electrical Engineering
www.asoos.com
Calgary AB T2P 3T9 Canada
OBJECTIVE
Research and design position that utilizes my extensive experience in Real-Time
Digital Signal Processing, Embedded Systems, Control Systems and Communication
Systems; including algorithm development, software, and hardware design.
SUMMARY OF QUALIFICATIONS
Over twenty years of industrial experience with companies such as Schlumberger,
ION Geophysical (Input/Output Inc.), General Electric, Tyco Telecommunications
(TyCom, formerly AT&T Bell Labs Terminal Development Organization for Undersea
Systems), Harris Corp., Nortel Networks, and NovAtel in a capacity of Research and
Development (R&D) team member and leader.
Broad academic experience at a post-secondary level, involving research, publishing,
curriculum development, and teaching.
AREAS OF EXPERTISE
Real-Time Digital Signal Processing (DSP)
- Implemented adaptive algorithms, such as the Recursive Least Square (RLS),
Least Mean Square (LMS), Kalman Filtering, and QR Decomposition, for system
identification, echo cancellation, equalization of communication channels.
- Experienced in Software-Defined Radio System (SDR) Design.
- Implemented Forward Error Correction (FEC) for error control in communication.
- Utilized DSPs, and used Matlab, Assembly, C, C++ language:
Analog Devices: ADSP-218xe, ADSP-2106x SHARC; VisualDSP++
Motorola/Freescale: 56F807; CodeWarrior
Texas Instruments: TMS320C2x, … TMS320C67xx; Code Composer
- Utilized FPGAs with the VHDL to implement Register-Transfer-Level (RTL) logic:
Xilinx: Spartan; ISE Foundation
Altera: Cyclone x; Quartus II, ModelSim PE, Nios
- Proficient in firmware development including hardware controllers (interrupts) and
device drivers.
Control Systems
- Utilized a Proportional-Integral-Differential (PID) controller to regulate laser device.
- Implemented Linear Quadratic Gaussian Regulators (LQGR) and H optimal control
design to stabilize high complexity dynamic systems.
- Implemented control mechanisms for Chaotic System Stabilization.
Hardware Design and Integration
- Designed signal processing systems using multiple DSP on the circuit board.
- Designed data acquisition electronic circuit boards using high-speed A/D.
- Experienced in Phase-Lock-Loop (PLL) design.
- Designed fiber-optic and copper communication interfaces for T1/E1 and Ethernet.
PROFESSIONAL EXPERIENCE
Digital S ignal Processor Engineer
2011 September – 2012 October
Schlumberger Ltd - Extreme Engineering, Calgary, AB
Developed Digital Signal Processing (DSP) a lgorithms using
C/C++ for programmable telecommunication systems to meet the
unique needs of low-power electromagnetic (EM) telemetry
system communications for Measurement W hile Drilling (MWD).
g
Worked on Software-Defined Radio System (S DR) Design in C/C++:
- Phase-Shift Keying (PSK) modulation transm itter and receiver design for
Binary PSK (BPSK) and Quadrature PS K (QPSK).
- Carrier and symbol synchronization in the re ceiver using correlation and
rotation.
- Calculation of received symbol confidence fo r error corr
rection.
- Signal-to-Noise Ratio (SNR, S/N) estimation in the received signal.
- Automatic Gain Control (AGC) algorithm dev elopment using Hilbert
Transformations.
- Carrier phase and symbol timing estimation from the incoming signal for
coherent communications receiver des ign.
- Arbitrary sample rate change algorithm imp lementation with a combined Digital
down-converter/Decimation and up-co nverter/Interpolation algorithms,
using the cascaded integrator-comb (C IC) filter technique.
Lead Ha rdware Designer
2010 December – 2011 September
General Electric - Power Services, Markh am, ON
Responsible for the redesign and coordinatio n of pre-production processes for
various D20 Intelligent Peripheral Modules. T he D20 device is characterized by
distributed, expandable I/O architecture and mission-critical automation control
applications. The redesign included the repla cement of obsolete
parts, such as the HC11 processors with FPG A based soft-core
computation devices written in VHDL. Spear headed the required
r
product qualification tests, i.e., environment al, electrical,
Accelerated Life Testing (ALT) and Highly Ac celerated Life Testing (HALT).
Designe r
2010 April – 2010 December
Interalia Inc., Calgary, AB
Inertial Navigation system development for Light Rail Transit, to
supplement GPS measurements in places wi th limited satellite
reception. The implemented system, in C/C+ +, consists of a
combination of the GPS measurement, along with a three axes
MEMS accelerometer and gyroscope.
Staff Enginee r
2007 May – 2010 April
ION Geophysical Corporation, Stafford, T exas, USA
Responsible for designing a new generation of low power, battery operated
VectorSeis digital sensors. The VectorSeis se nsors are an essentiall
element in the field of seismic data processin g. Based on three
identical highly sensitive micro-electro-mech anical accelerometer
chips (MEMS), controlled by an FPGA where the local signal
processing is performed, VectorSeis measure true 3D ground motion and
res
records full seismic wave fields with unsurpa ssed vector fidelity.
Developed RTL Signal processing algorith ms in Delta-Sigma space using VHDL
a a
language in Cyclone III.
Defined and introduced a chaotic system stabilization algorithm.
Implemented a process for temperature c ompensation in a
measured signal using the Nios II process or in Cyclone III.
Participated in root cause of the PLL clock ’s jitter source. The clock is
used for timing the MEMS accelerometer, in order to archive a 146
dB dynamic range (24 bits) measurement s this clock required to be
clean in the same order.
Research Prog rammer
2007 September – 2010 April
Rice University, Houston, Texas, USA
Responsible for software development for XM L data processing
o
and Graphical User Interface (GUI) design u sing Qt development
environment. Debugging C++ software whic h implements the
Artificial Neural Networks based on Kohonen ’s Self-Organizing
Maps (SOM).
R&D Consulta nt.
2006 February – 2007 April
Nortel Networks – Calgary. AB
Developed DSP firmware for Texas Instru ments TMS320C5410A on
Nortel Triton System’s Global Analog Trun k Service Card.
Designed software for testing and monito ring hardware integrity in
cooperation with Flextronics Corp.
Defined an adaptive echo cancellation alg orithm for enhanced near-end echo
cancellation for the connection of Nortel’s products with the Public
Switched Telephone Network (PSTN). Pro ducts included the
Business Communications Manager 50 (BCM50), which is an all-in-
B
one platform for converged voice and dat a communications.
t
2002 September – 2003 October
aSoos Inc., Calgary, AB
Developed an analog interface board (A2D2A) for Texas Instruments TMS320
DSK system, which is capable of simultaneo usly samplin 8 analog input signals
ng
and driving 4 analog output signals, controll ed by any Texas
Instruments Development Starter Kit (DSK).
Senior Hardw are Designer - Consultant.
2002 April – 2002 September
General Electric - Power Services, Calgar y, AB
Evaluated the DSP enhancement possibili ties and proposed
a new design solution for the existing “D2 5 Substation
Controller,” a multifunctional intelligent e lectronic device
which measures the power quality of tran smission lines.
Redesigned the DSP board of the “D25 Su bstation Controller,” including
software improvement and FPGA code de velopment.
Developed initial self-diagnostic software for the DSP subsystem on the “D25
Substation Controller”.
Senior Member of T echnical S
Staff
2001 May – 2002 February
Tyco Telecommunications (US) Inc., Eato ntown, New Jersey, USA
For “Dry Plants” the transmission, power ing, and network monitoring
equipment that is located at cable station s:
Responsible for the design and implemen tation of DSP and
maintenance processor-related firmware for transoceeanic
optical network line terminating and tran smission
equipment, using multiple Motorola 56F8 07 DSPs.
Implemented high accuracy control loops for laser wavelengths and power
control using PID and PWM controlled circ uits with thermo electric coolers
(TECs), to achieve 0.01K accuracy for th e laser temperature.
Advance System Ap plications Test Engineer
2000 January – 2001 May
Alberta Research Council, Calgary, AB
In response to the effort of the Government of Alberta to provide health care
over the Internet in remote locations:
Developed test procedures for network Q uality of Service
(QoS) testing and defined interoperability tests for Digital
Imaging and Communications in Medicine (DICOM).
Designed test procedures for Advance Sy stem Applications:
Improved interoperability test procedu res for H323 video conferencing
-
systems.
Implemented qualitative and quantitat ive operational characterizations for
-
H.323 video conferencing systems.
Senior Hardw are Designer
1998 January - 2000 January
General Electric - Power Services. Calgar y, AB
For the D25 substation controller, a multifun ctional intelligent electronic device:
Developed fiber-optic and twisted-pair tr ansceivers for
Ethernet network.
Designed data acquisition and signal pro cessing syst
tems:
Multiprocessor system using two ADSP -2185L DSPs from
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Analog Devices.
Autonomous 1 s A/D control logic in X ilinx's Spartan FPGA.
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Complex signaling and interrupt logic u sing RTL in FPGA.
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Digital Design er
1994 May - 1998 January
NovAtel Inc., Calgary, AB
Harris Inc., Harris Wireless Access Divisi on, Calgary, AB
For the cellular systems of a remote and rur al telecommunications markets:
Responsible for developing and implementin g base-band signal processing
algorithms for the North American TDMA Ce llular system’s base station.
Designed DSP software using Texas Instru ments DSP TMS320C54x:
- Designed and implemented base-band processing
algorithms for North American TDMA c ellular air protocol
according to IS-136 standard: compan dor (2:1), pre-
emphasis, de-emphasis, interpolations, decimation, SAT
ton generation and detection.
- Designed software for Echo cancellatio n and Equalization of communication
a
channels.
Developed digital hardware for T1/E1 prim ary rate communication:
- Generated base-station clocks with PLL circuits.
- Implemented logic circuits using CPLD and VHDL language.
Research Asso ciate
1993 September - 1994 May
Electrical and Computer Engineering, University of Calgary, Calgary, AB
n
Developed and implemented an optimal ada ptive control algorithm
as a power system stabilizer for the collabor ative research project
between the University of Calgary and ABB Switzerland. The
developed system was tested in a power sys tem in Brazil.
Assistant Prof essor
1989 December – 1993 July
Polytechnic Engineering College, Subotica, Serbia
Taught several courses and conducted resea rch:
Fundamentals of Electromagnetic Fields
Electric Circuits and Systems
Practical Electronics Design.
Supervised students' research projects for d iploma examination.
Designed and managed industry funded rese arch projects:
Research in insulation characterization, based on partial electric
discharge.
Improvements to the control of stocking man ufacturing e
equipment.
Design Engine er
1986 April – 1989 December
SEVER – Subotica / Electric Motors and A ccessories, Subotica, Serbia
Designed I/O peripherals for Programmab le Logic Controllers
(PLC).
Designed communication controllers for P LCs.
EDUCATION
2005 University of Calgary Calgary, AB. Canada
PhD in Electrical Engineering with specializa
ation in Signal Processing
and Control Systems:
“H Model Predictive Control - Theory and Application”
1997 University of Calgary Calgary, AB. Canada
MSc in Electrical Engineering with specializ ation in Control Systems:
z
“An Optimal Adaptive Power System Stabili zer”
1986 University of Novi Sad Novi Sad, Serbia
Dipl. Ing. (Bsc; five year program) in Elect rical Engineering –
Measurements and Control Systems:
“Developing Control via Hydraulic Robotics”
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